nb3n2304nz ON Semiconductor, nb3n2304nz Datasheet - Page 2

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nb3n2304nz

Manufacturer Part Number
nb3n2304nz
Description
3.3v 1 4 Clock Fanout Buffer
Manufacturer
ON Semiconductor
Datasheet

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Table 1. PIN DESCRIPTION
Pin #
1
2
3
4
5
6
7
8
OE
IN
Figure 2. Block Diagram
Name
GND
V
Pin
OE
Q1
Q2
Q3
Q4
IN
DD
Control
Logic
EP (DFN8)
(LV)CMOS/(LV)TTL Output
Table 2. OE, OUTPUT ENABLE FUNCTION TABLE
(LV)CMOS/(LV)TTL Input
(LV)CMOS/(LV)TTL Input
LVCMOS/LVTTL Output
LVCMOS/LVTTL Input
LVCMOS/LVTTL Input
IN
H
H
L
L
Power
Power
Type
Q1
Q2
Q3
Q4
Inputs
Clock Input
Output Enable for the clock outputs. Outputs are enabled when forced HIGH. Outputs
are forced to logic LOW when OE is forced LOW.
Clock Output 1
Negative Supply Voltage; Connect to Ground, 0 V
Clock Output 2
Positive Supply Voltage (3.0 V to 3.6 V)
Clock Output 3
Clock Output 4
Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to
the most negative supply or leave floating open.
OE
H
H
L
L
http://onsemi.com
NB3N2304NZ
2
Figure 3. NB3N2304NZ Package Pinout (Top View)
GND
OE
Q1
IN
Description
Outputs
1
2
3
4
H
L
L
L
8
7
6
5
Q4
Q3
V
Q2
DD

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