cgs74c2525 National Semiconductor Corporation, cgs74c2525 Datasheet - Page 2

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cgs74c2525

Manufacturer Part Number
cgs74c2525
Description
1-to-8 Minimum Skew Clock Driver
Manufacturer
National Semiconductor Corporation
Datasheet

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Functional Description
On the multiplexed clock device the SEL pin is used to
determine which CLKn input will have an active effect on
the outputs of the circuit When SEL
selected and when SEL
The non-selected CLKn input will not have any effect on the
logical output level of the circuit The output pins act as a
single entity and will follow the state of the CLK or
CLK1 CLK0 pins when either the multiplexed (’2526) or the
straight (’2525) clock distribution chip is selected
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CLK
CLK0 CLK1
O
SEL
Pin Names
0
– O
7
Pin Description
e
Clock Input (’2525)
Clock Inputs (’2526)
Outputs
Clock Select (’2526)
’2525
0 the CLK0 input is selected
Description
e
1 the CLK1 input is
TL F 10684 – 7
2
Truth Tables
L
H
X
e
e
CLK0
e
Inputs
H
X
X
Low Voltage Level
L
High Voltage Level
Immaterial
CLK
H
L
Inputs
’2525
CLK1
X
X
H
L
’2526
Outputs
O
0
H
L
– O
SEL
H
H
L
L
7
’2526
Outputs
O
0
H
H
– O
L
L
7
TL F 10684 – 8

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