sky74100-21 Skyworks Solutions, Inc., sky74100-21 Datasheet - Page 4

• Manufacturer Part Number: sky74100-21
• Description: Sky74100-21 Dual-band Receiver For Cdma And Pcs Femtocell Applications
• Manufacturer: Skyworks Solutions, Inc.

DATA SHEET • SKY74100-21 CDMA RECEIVER
Table 1. SKY74100-21 Signal Descriptions
4
Pin #
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
VCO_BYPASS
VCO_BIAS_RES
PCS_MIX_IN–
PCS_MIX_IN+
VCC_MIX
CELL_MIX_IN+
CELL_MIX_IN–
VCC_RF_BIAS
RF_RES_BIAS
N/C
N/C
N/C
MIX_GAINSTEP
VCC_BB
VCC_BB2
FILT_TUNE_MIX
I_OFFSET
Q_OFFSET
Q_OUT+
Q_OUT–
Name
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
July 22, 2010 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 200762C
Negative RF input for PCS mixer. Requires
external match.
Positive RF input for PCS mixer. Requires
external match.
Supply for RF mixer bias.
Positive RF input for CDMA mixer. Requires
external match.
Negative RF input for CDMA mixer. Requires
external match.
mixers.
No connection
No connection
No connection
Control pin used to switch the mixer and
baseband gain.
Supply for baseband block.
Ground
No connection
No connection
Positive Q channel baseband output. Requires
a 5 k shunt load resistor shared with pin 20.
Negative Q channel baseband output. Shunt
load shared with pin 19.
External bypass capacitor for VCO bias.
External resistor to set VCO bias.
Supply for RF bias block.
External resistor to set RF bias for LNA and
Supply for baseband.
Description
Pin #
23
24
25
26
27
29
30
32
33
34
36
38
39
40
21
22
28
31
35
37
I_OUT–
I_OUT+
CLK_RX
DATA_RX
LE_RX
CLK_AUX
DATA_AUX
LE_AUX
PLL_BIAS_RES
REF_CLK
VCC_CLK
VCC_DIG
LD_OUT
LPFILT_CTRL
CP_OUT
VCC_UHF_PLL
VCO_TUNE
BIDIRECTIONAL_LO
VCC_VCO
VCC_DIV
Name
Negative I channel baseband output. Requires
a shunt load resistor of 5 k shared with
pin 22.
Positive I channel baseband output. Shunt load
shared with pin 21.
Clock for receive serial I/O.
Data for receive serial I/O.
Latch enable for receive serial I/O.
Clock for auxiliary serial I/O.
Data for auxiliary serial I/O.
Latch enable for auxiliary serial I/O.
External resistor for PLL bias..
Reference clock input (TCXO).
Supply for TCXO reference buffer.
Digital supply.
Lock detect output for PLL. This is an open
drain output. Requires a 10 k pullup for VCC.
Provides a bit from internal serial I/O to switch
between external loop filter components. This
is an open drain output.
Charge pump output. Connected to external
loop filter.
Supply for RF PLL.
VCO tuning voltage. Tuning range is 0.5 V to
2.5 V.
No connection
Supply for VCO core.
Supply for LO dividers.
Description