mc145201dt Freescale Semiconductor, Inc, mc145201dt Datasheet - Page 2

• Manufacturer Part Number: mc145201dt
• Description: 2.0 Ghz Pll Frequency Synthesizers
• Manufacturer: Freescale Semiconductor, Inc

* Maximum Ratings are those values beyond which damage to the device may occur.
MC145200 MC145201
2
MAXIMUM RATINGS*
Functional operation should be restricted to the limits in the Electrical Characteristics tables
or Pin Descriptions section.
Symbol
I in , I PD
SUPPLY CONNECTIONS:
REF out
V CC ,
V DD
V PD
V out
V out
T stg
I out
I DD
PIN 12 = V CC (V+ TO INPUT AMP AND 64/65 PRESCALER)
PIN 5 = V PD (V+ TO PHASE/FREQUENCY DETECTORS A AND B)
PIN 14 = V DD (V+ TO BALANCE OF CIRCUIT)
PIN 7 = GND (COMMON GROUND)
V in
P D
REF in
T L
ENB
CLK
D in
f in
f in
18
19
17
20
DC Supply Voltage (Pins 12 and 14)
DC Supply Voltage (Pin 5)
DC Input Voltage
DC Output Voltage
(except OUTPUT B, PD out , R , V )
DC Output Voltage (OUTPUT B, PD out , R , V )
DC Input Current, per Pin (Includes V PD )
DC Output Current, per Pin
DC Supply Current, V DD and GND Pins
Power Dissipation, per Package
Storage Temperature
Lead Temperature,
1 mm from Case for 10 seconds
1
11
10
(CONFIGURABLE)
INTERNAL
CONTROL
4–STAGE
DIVIDER
OSC OR
(Voltages Referenced to GND, unless otherwise stated)
INPUT
AMP
REGISTER
CONTROL
Parameter
LOGIC
SHIFT
AND
4
24
3
MC145200
MC145201
PRESCALER
A COUNTER
6–STAGE
64/65
BitGrabber R REGISTER
BitGrabber C REGISTER
STANDBY
BitGrabber A REGISTER
13–STAGE R COUNTER
LOGIC
DOUBLE–BUFFERED
BLOCK DIAGRAM
6
V DD – 0.5 to + 9.5
V DD – 0.5 to + 6.0
– 0.5 to V DD + 0.5
– 0.5 to V DD + 0.5
– 0.5 to V PD + 0.5
16 BITS
24 BITS
8 BITS
– 0.5 to + 6.0
– 65 to + 150
POR
Value
13
300
260
10
20
30
2
MODULUS
N COUNTER
CONTROL
12–STAGE
LOGIC
12
Unit
mW
mA
mA
mA
V
V
V
V
V
C
C
guard against damage due to high static volt-
ages or electric fields. However, precautions
must be taken to avoid applications of any volt-
age higher than maximum rated voltages to
this high–impedance circuit.
This device contains protection circuitry to
DATA OUT
DETECTOR A AND CONTROL
DETECTOR B AND CONTROL
PORT
PHASE/FREQUENCY
PHASE/FREQUENCY
f R
f V
LOCK DETECTOR
AND CONTROL
SELECT
LOGIC
OUTPUT B
(OPEN–DRAIN
OUTPUT)
MOTOROLA
TEST 2
TEST 1
15
13
9
16
OUTPUT A
2
8
6
3
4
PD out
LD
Rx
R
V