mc14560b Freescale Semiconductor, Inc, mc14560b Datasheet - Page 6

• Manufacturer Part Number: mc14560b
• Description: Nbcd Adder
• Manufacturer: Freescale Semiconductor, Inc

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000 + Carry
0001 + Carry
0010 + Carry
0011 + Carry
MC14560B
6
C in
(a) MC14560 Block Diagram
BINARY SUMS WITH
CARRY FROM CONVERTERS
Binary Sums
4 BIT BINARY FULL ADDER
4 BIT BINARY ADDERS
Non valid
BCD
representation
CODE CONVERTERS
DIGIT BINARY SUMS
CODE CONVERTER
A
BINARY TO NBCD
CORRECTED SUM
Table 1. Sum = A + B + C
RESULT, R
12,811
+
6,941
5,870
B
Numbers
Decimal
C out
10
12
13
14
15
16
17
18
19
11
0
1
2
3
4
5
6
7
8
9
Figure 5. Addition of Unsigned NBCD Numbers
Figure 4. Unsigned NBCD Addition Algorithm
C out
1
THOUSANDS
ADDER
1011
1100
Binary Sums
0110
0101
0 0 1 0
0000 + Carry
0001 + Carry
0010 + Carry
0011 + Carry
0100 + Carry
0101 + Carry
0110 + Carry
1000 + Carry
1001 + Carry
0111 + Carry
Corrected
0000
0001
0010
0011
0100
0101
0110
1000
1001
0111
C in
C in
A1
MC14560
1
R1
1
1
C out
B1
HUNDREDS
C out
ADDER
1001
1000
0001
0010
1 0 0 0
ADDITION AND SUBTRACTION OF SIGNED NBCD
NUMBERS
menters, a sign and magnitude adder/subtracter can be con-
figured (Figure 5). Inputs A and B are signed positive (A S , B S
= “0”) or negative (A S , B S = “1”). B is added to or subtracted
from A under control of an Add/Sub line (subtraction = “1”).
The result, R, of the operation is positive signed, positive
signed with overflow, negative signed, or negative signed
with overflow. Add/subtract time is typically 0.6 + 0.4n s for
n decades.
which controls the B complementers. If B S , the sign of B, is a
logical “1” (B is negative) and the Add/Sub line is a “0” (add
B to A), then the output of the exclusive–OR (B S ) is a logical
“1” and B is complemented. If B S = “1” and Add/Sub = “1”, B
is not complemented since subtracting a negative number is
the same as adding a positive number. When Add/Sub is a
“1” and B S = “0”, B S is a “1” and B is complemented. The A
complementer is controlled by the A sign bit, A S . When A S =
“1”, A is complemented.
Using MC14560 NBCD Adders and MC14561 9’s Comple-
An exclusive–OR of Add/Sub line and B S produces B ,
C in
C in
(b) n–Decade Adder
A2
1
Typical Add Time = 0.1 + 0.2n s
where n = Number of Decades
MC14560
C out
R2
ADDER
TENS
0100
1011
1011
0111
B2
0 0 0 1
C out
MOTOROLA CMOS LOGIC DATA
C in
0
C in
C out
A n
MC14560
ADDER
UNITS
0001
0000
0001
0001
R n
0 0 0 1
B n
C out
OVERFLOW