pll103-03 PhaseLink Corp., pll103-03 Datasheet

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pll103-03

Manufacturer Part Number
pll103-03
Description
Ddr Sdram Buffer With 4 Ddr Or 3 Sdr/2 Ddr Dimms - Phaselink Corporation
Manufacturer
PhaseLink Corp.
Datasheet
FEATURES
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
BUF_IN
SDATA
SCLK
Generates 24-output buffers from one input.
Supports up to 4 DDR DIMMS or 3 SDR DIMMS
and 2 DDR DIMMS.
Supports 266MHz DDR SDRAM.
One additional output for feedback.
Less than 5ns delay.
Skew between any outputs is less than 100 ps.
2.5V or 3.3V Supply range.
Enhanced DDR and SDRAM Output Drive
selected by I2C.
Available in 48 pin SSOP.
PD#
Control
I2C
DDR SDRAM Buffer with 4 DDR or 3 SDR/2 DDR DIMMS
DDR0T_SDRAM10
DDR0C_SDRAM11
DDR1T_SDRAM0
DDR1C_SDRAM1
DDR2T_SDRAM2
DDR2C_SDRAM3
DDR3T_SDRAM4
DDR3C_SDRAM5
DDR4T_SDRAM6
DDR4C_SDRAM7
DDR5T_SDRAM8
DDR5C_SDRAM9
DDR6T
DDR6C
DDR7T
DDR7C
DDR8T
DDR8C
DDR9T
DDR9C
DDR10T
DDR10C
DDR11T
DDR11C
FBOUT
PIN CONFIGURATION
Note: #: Active Low
DESCRIPTIONS
The PLL103-03 is designed as a 3.3V/2.5V buffer to
distribute high-speed clocks in PC applications. The
device has 24 outputs. These outputs can be
configured to support four unbuffered DDR (Double
Data Rate) DIMMS or to support 2 unbuffered
standard SDR (Single Data Rate) DIMMS and 2 DDR
DIMMS. The PLL103-03 can be used in conjunction
with the PLL202-04 or similar clock synthesizer for
the VIA Pro 266 chipset.
The PLL103-03 also has an I2C interface, which can
enable or disable each output clock. When power up,
all output clocks are enabled (has internal pull up).
DDR0C_SDRAM11
DDR0T_SDRAM10
DDR1C_SDRAM1
DDR2C_SDRAM3
DDR3C_SDRAM5
DDR4C_SDRAM7
DDR5C_SDRAM9
DDR1T_SDRAM0
DDR2T_SDRAM2
DDR3T_SDRAM4
DDR4T_SDRAM6
DDR5T_SDRAM8
VDD3.3_2.5
VDD3.3_2.5
VDD3.3_2.5
VDD3.3_2.5
VDD3.3_2.5
BUF_IN
FBOUT
SDATA
GND
GND
GND
GND
Preliminary
1
2
3
4
5
6
7
8
9
10
11
13
15
16
18
19
12
14
17
20
21
22
23
24
PLL103-03
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SEL_DDR
VDD2.5
GND
DDR11T
DDR11C
DDR10T
DDR10C
VDD2.5
GND
DDR9T
DDR9C
VDD2.5
PD#
GND
DDR8T
DDR8C
VDD2.5
GND
DDR7T
DDR7C
DDR6T
DDR6C
GND
SCLK
Rev 08/28/00 Page 1

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pll103-03 Summary of contents

Page 1

... DDR0C_SDRAM11 DDR1T_SDRAM0 Note: #: Active Low DDR1C_SDRAM1 DDR2T_SDRAM2 DESCRIPTIONS DDR2C_SDRAM3 DDR3T_SDRAM4 The PLL103-03 is designed as a 3.3V/2.5V buffer to DDR3C_SDRAM5 distribute high-speed clocks in PC applications. The DDR4T_SDRAM6 device has 24 outputs. These outputs can be DDR4C_SDRAM7 configured to support four unbuffered DDR (Double DDR5T_SDRAM8 Data Rate) DIMMS or to support 2 unbuffered ...

Page 2

... When SEL_DDR=1, these outputs provide complementary copies of O BUF_IN; when SEL_DDR=0, these outputs provide standard SDRAM mode outputs. Voltage swing depends on VDD3.3_2.5. When VDD=2.5V, SEL_DDR=1. DDR-ONLY mode is selected; when P VDD=3.3V, SEL_DDR=0. STANDARD SDRAM mode is selected. P 2.5V power supply. P Ground. PLL103-03 Preliminary Description Rev 08/28/00 Page 2 ...

Page 3

... Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Default Description 1 SEL_DDR ( I2C is ready only, value is set through pin48 ) 0 Enhanced SDRAM Drive Enhanced 25% 0 Enhanced DDR Drive Enhanced 25% 0 Reserved 1 DDR11T, DDR11C 1 DDR10T, DDR10C 1 DDR9T, DDR9C 1 DDR8T, DDR8C PLL103-03 Preliminary Rev 08/28/00 Page 3 ...

Page 4

... Bit 2 10, 11 Bit Bit 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Default Description 1 DDR7T, DDR7C 1 DDR6T, DDR6C 1 DDR5T_SDRAM8, DDR5C_SDRAM9 1 DDR4T_SDRAM6, DDR4C_SDRAM7 1 DDR3T_SDRAM4, DDR3C_SDRAM5 1 DDR2T_SDRAM2, DDR2C_SDRAM3 1 DDR1T_SDRAM0, DDR1C_SDRAM1 1 DDR0T_SDRAM10, DDR0C_SDRAM11 PLL103-03 Preliminary Rev 08/28/00 Page 4 ...

Page 5

... Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 SYMBOL SYMBOL V V CONDITIONS All Inputs except I2C All inputs except I2C IOL = -12mA, VDD = 2.375V IOL = 12mA, VDD = 2.375V VDD = 2.375V, VOUT=1V VDD = 2.375V, VOUT=1.2V PLL103-03 Preliminary MIN. MAX 0 ...

Page 6

... Note: TBM measured 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 CONDITIONS Unloaded outputs, 133MHz Unloaded outputs, 133MHz Measured @ 1.5V Measured @ 0.4V ~ 2.4V Measured @ 2.4V ~ 0.4V All outputs equally loaded PLL103-03 Preliminary MIN. TYP. MAX. TBM TBM TBM (VDD/2) (VDD/2)+ VDD/2 -0.1 ...

Page 7

... MIN (0.20 - 0.41) 48PIN SSOP 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL103- PLL103-03 Preliminary 0.025 0.835 0.088 - 0.096 (2.250 - 2.450) 0.097 - 0.104 (2.467 - 2.642) TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE ...

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