74vhc257 STMicroelectronics, 74vhc257 Datasheet

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74vhc257

Manufacturer Part Number
74vhc257
Description
Quad 2 Channel Multiplexer 3-state
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
The 74VHC257 is an advanced high-speed
CMOS
(3-STATE) fabricated with sub-micron silicon gate
and double-layer metal wiring C
It is composed of four independent 2-channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The VHC257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
HIGH SPEED: t
LOW POWER DISSIPATION:
I
HIGH NOISE IMMUNITY:
V
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
CC
PLH
OH
NIH
CC
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 5.5V
= V
QUAD
t
PHL
OL
NIL
= 8mA (MIN)
= 28% V
2-CHANNEL
OLP
PD
= 3.7ns (TYP.) at V
= 0.8V (MAX.)
CC
A
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
=25°C
(MIN.)
2
MOS technology.
MULTIPLEXER
CC
= 5V
Table 1: Order Codes
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B" data
is chosen.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74VHC257
Rev. 4
74VHC257MTR
74VHC257TTR
TSSOP
T & R
1/14

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74vhc257 Summary of contents

Page 1

... PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 IMPROVED LATCH-UP IMMUNITY LOW NOISE 0.8V (MAX.) OLP DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring composed of four independent 2-channel multiplexers with common SELECT and ENABLE (OE) INPUT ...

Page 2

... Figure 2: Input Equivalent Circuit Table 3: Truth Table OE SELECT Don’t Care Z : High Impedance Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays 2/14 Table 2: Pin Description PIN N° 11 10 ...

Page 3

... V Input Voltage I V Output Voltage O T Operating Temperature op Input Rise and Fall Time (note 1) (V dt/ from 30 Parameter Parameter = 3.3 0.3V 5.0 0.5V) CC 74VHC257 Value Unit -0.5 to +7.0 V -0.5 to +7 -65 to +150 °C 300 °C Value Unit ...

Page 4

... Table 6: DC Specifications Symbol Parameter V High Level Input IH Voltage 3 Low Level Input IL Voltage 3 High Level Output OH Voltage V Low Level Output OL Voltage I High Impedance OZ Output Leakage Current I Input Leakage I Current I Quiescent Supply CC Current 4/14 Test Condition (V) Min. 2.0 1.5 0.7V CC 5.5 2.0 5 ...

Page 5

... A Typ. Max. Min. Max. Min. 5.8 9.3 1.0 11.0 1.0 8.3 12.8 1.0 14.5 1.0 3.6 5.9 1.0 7.0 1.0 5.1 7.9 1.0 9.0 1.0 7.0 11.0 1.0 13.0 1.0 9.5 14.5 1.0 16.5 1.0 4.0 6.8 1.0 8.0 1.0 5.5 8.8 1.0 10.0 1.0 6.7 10.5 1.0 12.5 1.0 9.2 14.0 1.0 16.0 1.0 3.6 6.8 1.0 8.0 1.0 5.1 8.8 1.0 10.0 1.0 8.6 12.0 1.0 13.5 1.0 5.7 7.9 1.0 9.0 1.0 Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min CC(opr 74VHC257 Unit Max. 11.0 14.5 ns 7.0 9.0 13.0 16.5 ns 8.0 10.0 12.5 16.0 ns 8.0 10.0 13.5 ns 9.0 Unit Max (per IN CC 5/14 ...

Page 6

... Table 9: Dynamic Switching Characteristics Symbol Parameter V Dynamic Low OLP Voltage Quiet V OLV Output (note 1, 2) Dynamic High V Voltage Input IHD (note 1, 3) Dynamic Low V Voltage Input ILD (note Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND. ...

Page 7

... Figure 5: Waveform - Propagation Delays For Inverting Conditions (f=1MHz; 50% duty cycle) Figure 6: Waveform - Propagation Delays For Non-inverting Conditions (f=1MHz; 50% duty cycle) 74VHC257 7/14 ...

Page 8

... Figure 7: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle) 8/14 ...

Page 9

... 9 3.8 G 4 mm. TYP MAX. 1.75 0.25 0.004 1.64 0.46 0.013 0.25 0.007 0.5 45° (typ.) 10 0.385 6.2 0.228 1.27 8.89 4.0 0.149 5.3 0.181 1.27 0.019 0.62 8° (max.) 74VHC257 inch MIN. TYP. 0.019 0.050 0.350 0016020D MAX. 0.068 0.010 0.063 0.018 0.010 0.393 0.244 0.157 0.208 0.050 0.024 9/14 ...

Page 10

... DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 4.9 E 6 0˚ PIN 1 IDENTIFICATION 1 10/14 TSSOP16 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 1 1.05 0.30 0.20 5 5.1 6.4 6.6 4.4 4.48 0.65 BSC 8˚ 0.60 0. inch MIN. TYP. 0.002 0.004 0.031 0.039 0.007 0.004 0.0079 0.193 0.197 0.244 0.252 0.169 0.173 0.0256 BSC 0˚ ...

Page 11

... Tape & Reel SO-16 MECHANICAL DATA DIM. MIN 12 6.45 Bo 10.3 Ko 2.1 Po 3.9 P 7.9 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 6.65 0.254 10.5 0.406 2.3 0.082 4.1 0.153 8.1 0.311 74VHC257 inch MIN. TYP. MAX. 12.992 0.519 0.882 0.262 0.414 0.090 0.161 0.319 11/14 ...

Page 12

... Tape & Reel TSSOP16 MECHANICAL DATA DIM. MIN 12 6.7 Bo 5.3 Ko 1.6 Po 3.9 P 7.9 12/14 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 6.9 0.264 5.5 0.209 1.8 0.063 4.1 0.153 8.1 0.311 inch MIN. TYP. MAX. 12.992 0.519 0.882 0.272 0.217 0.071 0.161 0.319 ...

Page 13

... Table 10: Revision History Date Revision 12-Nov-2004 4 Description of Changes Order Codes Revision - pag. 1. 74VHC257 13/14 ...

Page 14

... Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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