m48t129v STMicroelectronics, m48t129v Datasheet - Page 12

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m48t129v

Manufacturer Part Number
m48t129v
Description
5.0 Or 3.3v, 1 Mbit 128 Kbit X 8 Timekeeper Sram
Manufacturer
STMicroelectronics
Datasheet

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M48T129Y, M48T129V
Data Retention Mode
With valid V
as a conventional BYTEWIDE™ static RAM.
Should the supply voltage decay, the RAM will au-
tomatically deselect, write protecting itself when
V
dow. All outputs become high impedance and all
inputs are treated as “Don't care.”
Note: A power failure during a WRITE cycle may
corrupt data at the current addressed location, but
does not jeopardize the rest of the RAM's content.
At voltages below V
in a write protected state, provided the V
time is not less than t
spond to transient noise spikes on V
12/30
CC
falls between V
CC
applied, the M48T129Y/V operates
PFD
PFD
F
. The M48T129Y/V may re-
(min), the memory will be
(max), V
PFD
CC
(min) win-
that cross
CC
fall
into the deselect window during the time the de-
vice is sampling V
power supply lines is recommended.
When V
switches power to the internal battery, preserving
data and powering the clock. The internal energy
source will maintain data in the M48T129Y/V for
an accumulated period of at least 10 years at room
temperature. As system power rises above V
the battery is disconnected, and the power supply
is switched to external V
t
more detailed review of lifetime calculations,
please see Application Note AN1012.
REC
after V
CC
CC
drops below V
reaches V
CC
. Therefore, decoupling of the
CC
PFD
. Deselect continues for
SO
(max). For a further
, the control circuit
SO
,

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