adc0820ccwmx National Semiconductor Corporation, adc0820ccwmx Datasheet - Page 5
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adc0820ccwmx
Manufacturer Part Number
adc0820ccwmx
Description
8-bit High Speed ?p Compatible A/d Converter With Track/hold Function
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC0820CCWMX.pdf
(23 pages)
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t
Falling Edge of RD to Output Valid)
t
Rising Edge of RDY to Output
Valid)
t
t
(Delay from Rising Edge of RD to
Hi-Z State)
t
WR to Falling Edge of INT
t
RD to Rising Edge of INT
t
WR to Rising Edge of INT
t
t
t
t
to Next Conversion
Slew Rate, Tracking
C
C
C
AC Electrical Characteristics
ACC2
ACC3
I
1H
INTL
INTH
INTHWR
RDY
ID
RI
P
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to the GND pin, unless otherwise specified.
Note 3: Total unadjusted error includes offset, full-scale, and linearity errors.
Note 4: Accuracy may degrade if t
Note 5: When the input voltage (V
to 1 mA or less. The 4 mA package input current limits the number of pins that can exceed the power supply boundaries with a 1 mA current limit to four.
Note 6: Typicals are at 25˚C and represent most likely parametric norm.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Design limits are guaranteed but not 100% tested. These limits are not used to calculate outgoing quality levels.
Note 9: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
, Internal Comparison Time
The following specifications apply for V
VIN
OUT
IN
, Delay from End of Conversion
, Delay from INT to Output Valid
, Delay from RD to INT
, t
, Logic Input Capacitance
, Delay from Rising Edge of
, Delay from CS to RDY
, Analog Input Capacitance
, Delay from Rising Edge of
0H
, Access Time (Delay from
, Access Time (Delay from
, Logic Output Capacitance
, TRI-STATE Control
, Delay from Rising Edge of
Parameter
IN
WR
) at any pin exceeds the power supply rails (V
or t
RD
is shorter than the minimum value specified. See Accuracy vs. t
CC
Pin 7 = V
C
C
R
Pin 7=V
C
R
Pin 7 = V
t
t
Figures 2, 3, 4
C
Figure 5, C
Figure 2, C
Figure 5
Pin 7=V
Figure 3
Figures 2, 3, 4, 5
(Note 4) See Graph
RD
RD
L
L
PULLUP
L
L
L
=5V, t
=15 pF
=100 pF
=50 pF
=1k, C
=50 pFc
>
<
t
t
I
I
; Figure 4
; Figure 3
CC
CC
r
=t
= 1k and C
L
CC
CC
=10 pF
(Continued)
; Figures 4, 5
, t
f
L
L
=20 ns, V
Conditions
, t
, C
=50 pF
=50 pF, Pin 7 =0
RD
RD
L
<
= 50 pF
>
t
I
t
I
; Figure 4
L
REF
= 15 pF
5
(+)=5V, V
IN
<
V
−
or V
REF
IN
>
(−)=0V and T
V
(Note 6)
t
+
RD
) the absolute value of current at that pin should be limited
Typ
800
100
125
175
200
0.1
70
90
30
50
20
45
+200
5
5
WR
and Accuracy vs. t
A
=25˚C unless otherwise specified.
(Note 7)
Tested
Limit
RD
graphs.
(Note 8)
t
Design
RD
Limit
1300
120
150
200
225
270
100
290
500
50
+290
t
I
www.national.com
Units
V/µs
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns