adc0833ccj National Semiconductor Corporation, adc0833ccj Datasheet - Page 11

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adc0833ccj

Manufacturer Part Number
adc0833ccj
Description
8-bit Serial I/o A/d Converter With 4-channel Multiplexer
Manufacturer
National Semiconductor Corporation
Datasheet
Functional Description
4 When the start bit has been shifted into the start location
of the MUX register the input channel has been assigned
and a conversion is about to begin An interval of
period (where nothing happens) is automatically inserted to
allow the selected MUX channel to settle The SAR status
line goes high at this time to signal that a conversion is now
in progress and the DI line is disabled (it no longer accepts
data)
5 The data out (DO) line now comes out of TRI-STATE and
provides a leading zero for this one clock period of MUX
settling time
6 When the conversion begins the output of the SAR com-
parator which indicates whether the analog input is greater
than (high) or less than (low) each successive voltage from
the internal resistor ladder appears at the DO line on each
falling edge of the clock This data is the result of the con-
version being shifted out (with the MSB coming first) and
can be read by the processor immediately
7 After 8 clock periods the conversion is completed The
SAR status line returns low to indicate this
later
8 If the programmer prefers the data can be read in an LSB
first format All 8 bits of the result are stored in an output
shift register The conversion result LSB first is automati-
cally shifted out the DO line after the MSB first data stream
The DO line then goes low and stays low until CS is re-
turned high
9 All internal registers are cleared when the CS line is high
If another conversion is desired CS must make a high to
low transition followed by address information
The DI and DO lines can be tied together and controlled
through a bidirectional processor I O bit with one wire This
is possible because the DI input is only ‘‘looked-at’’ during
the MUX addressing interval while the DO line is still in a
high impedance state
3 0 REFERENCE CONSIDERATIONS
The ADC0833 is intended primarily for use in circuits requir-
ing absolute accuracy In this type of system the analog
V
FULL-SCALE
Note No external biasing resistor needed if V
j 2 4V
(Continued)
FIGURE 2 Reference Biasing Examples
clock cycle
clock
11
inputs vary between very specific voltage limits and the ref-
erence voltage for the A D converter must remain stable
with time and temperature For ratiometric applications an
ADC0834 is a pin-for-pin compatible alternative since it has
a V
addressing information)
The voltage applied to the V
span of the analog input the difference between V
and V
ply A full-scale conversion (an all 1s output code) will result
when the voltage difference between a selected ‘‘
and ‘‘
V
ence to the full-scale input voltage allows biasing a low volt-
age reference diode from the 5V
accommodate a 5V input span only a 2 5V reference is
required The LM385 and LM336 reference diodes are good
low current devices to use with these converters The out-
put code changes in accordance with the following equa-
tion
where the output code is the decimal equivalent of the 8-bit
binary output (ranging from 0 to 255) and the term V
the voltage from pin 9 to ground
The V
(each resistor is 3 5 kX) connected from V
Total ladder input resistance is the sum of these two equal
resistors As shown in Figure 2 a reference diode with a
voltage less than V
an external biasing resistor if its current requirements meet
the indicated level
The minimum value of V
cal Performance Characteristics) to allow direct conversions
of transducer outputs providing less than a 5V output span
Particular care must be taken with regard to noise pickup
circuit layout and system error voltage sources when oper-
ating with a reduced span due to the increased sensitivity of
the converter (1 LSB equals V
Z k
REF
REF
V
CC
2
IN
b
REF
2 pin This internal gain of 2 from the applied refer-
and I
input (note the ADC0834 needs one less bit of mux
(
’’ input is approximately twice the voltage at the
b
Output Code
) over which the 256 possible output codes ap-
2 pin is the center point of a two resistor divider
V
Z
FULL-SCALE
min
k
V
CC
CC
1 75 kX
j 5 0V
2
e
2 can be connected without requiring
b
REF
256
V
Z
2 can be quite small (see Typi-
REF

REF
V
IN
(
2 pin defines the voltage
2(V
DC
a
256)
)
REF
converter supply To
b
V
IN
2)
(
b
CC
TL H 5607 – 7
)
J
to ground
a
REF
’’ input
IN
(
2 is
a
)

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