adc12032 National Semiconductor Corporation, adc12032 Datasheet - Page 27

• Manufacturer Part Number: adc12032
• Description: Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
• Manufacturer: National Semiconductor Corporation

Status Bit
Status Bit
ADC12038
ADC12034
ADC12030
ADC12032
Location
Function
Note: The A/D powers up with no Auto Cal, no Auto Zero, 10 CCLK acquisition time, 12-bit + sign conversion, power up, 12- or 13-bit MSB first, and user mode.
X = Don’t Care
Application Hints
1.0 DIGITAL INTERFACE
1.1 Interface Concepts
The example in Figure 7 shows a typical sequence of events
after the power is applied to the ADC12030/2/4/8:
The first instruction input to the A/D via DI initiates Auto Cal.
The data output on DO at that time is meaningless and is
completely random. To determine whether the Auto Cal has
been completed, a read status instruction is issued to the
A/D. Again the data output at that time has no significance
FIGURE 7. Typical Power Supply Power Up Sequence
and
“High”
indicates a
Power Up
Sequence
is in
progress
DI0
DI0
DI0
H
H
DB0
L
PU
X = Don’t Care
DI1
DI1
DI1
CS
H
X
L
H
X
Device Status
L
L
“High”
indicates a
Power
Down
Sequence
is in
progress
DB1
CONV
PD
DI2
DI2
X
L
L
H
X
X
L
TABLE 6. Conversion/Read Data Only Mode Programming
DI3
X
“High”
indicates
an
Auto-Cal
Sequence
is in
progress
L
L
PD
H
L
L
L
DB2
Cal
TABLE 5. Mode Programming (Continued)
DI4
DI3
DI2
H
H
H
DI5
DI4
DI3
H
H
H
“High”
indicates
an 8 or 9
bit format
Read Only (Previous DO Format). No Conversion.
TABLE 7. Status Register
8 or 9
DB3
01135436
DI6
DI5
DI4
H
H
H
DI7
DI6
DI5
H
H
L
“High”
indicates a
12 or 13
bit format
27
12 or 13
See Table 5 for Mode
DB4
Acquisition Time — 34 CCLK Cycles
(CH1–CH7 become Active Outputs)
since the Auto Cal procedure modifies the data in the output
shift register. To retrieve the status information, an additional
read status instruction is issued to the A/D. At this time the
status data is available on DO. If the Cal signal in the status
word, is low Auto Cal has been completed. Therefore, the
next instruction issued can start a conversion. The data
output at this time is again status information. To keep noise
from corrupting the A/D conversion, status can not be read
during a conversion. If CS is strobed and is brought low
during a conversion, that conversion is prematurely ended.
EOC can be used to determine the end of a conversion or
the A/D controller can keep track in software of when it would
be appropriate to comnmunicate to the A/D again. Once it
has been determined that the A/D has completed a conver-
sion, another instruction can be transmitted to the A/D. The
data from this conversion can be accessed when the next
instruction is issued to the A/D.
Note, when CS is low continuously it is important to transmit
the exact number of SCLK cycles, as shown in the timing
diagrams. Not doing so will desynchronize the serial com-
munication to the A/D. (See Section 1.3.)
Power Down
Mode
Idle
“High”
indicates a
16 or 17
bit format
DO Output Format Status
16 or 17
Mode Selected
DB5
User Mode
Test Mode
(Current)
“High”
indicates
that the
sign bit is
included.
When
“Low” the
sign bit is
not
included.
Sign
DB6
When “High”
the
conversion
result will be
output MSB
first. When
“Low” the
result will be
output LSB
first.
Justification
DB7
(next Conversion
DO Format
No Change
No Change
No Change
Cycle)
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When “High”
the device is
in test mode.
When “Low”
the device is
in user
mode.
Test Mode
DB8