adc128s102wgmpr National Semiconductor Corporation, adc128s102wgmpr Datasheet - Page 2

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adc128s102wgmpr

Manufacturer Part Number
adc128s102wgmpr
Description
Adc128s102qml 8-channel, 50 Ksps To 1 Msps, 12-bit A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet

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Manufacturer
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Part Number:
ADC128S102WGMPR
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ANALOG I/O
DIGITAL I/O
POWER SUPPLY
Block Diagram
Pin Descriptions and Equivalent Circuits
Pin No.
4 - 11
16
15
14
13
12
1
2
3
IN0 to IN7
Symbol
DGND
DOUT
AGND
SCLK
DIN
CS
V
V
A
D
Equivalent Circuit
2
Analog inputs. These signals can range from 0V to V
Digital clock input. The guaranteed performance range of
frequencies for this input is 0.8 MHz to 16 MHz. This clock directly
controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin
on the falling edges of the SCLK pin.
Digital data input. The ADC128S102QML's Control Register is
loaded through this pin on rising edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process
begins. Conversions continue as long as CS is held low.
Positive analog supply pin. This voltage is also used as the
reference voltage. This pin should be connected to a quiet +2.7V
to +5.25V source and bypassed to GND with 1 µF and 0.1 µF
monolithic ceramic capacitors located within 1 cm of the power pin.
Positive digital supply pin. This pin should be connected to a +2.7V
to V
ceramic capacitor located within 1 cm of the power pin.
The ground return for the analog supply and signals.
The ground return for the digital supply and signals.
A
supply, and bypassed to GND with a 0.1 µF monolithic
Description
30018107
REF
.

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