adc100ca Thaler Corporation, adc100ca Datasheet - Page 5

• Manufacturer Part Number: adc100ca
• Description: Adc100 Precision 22 Bit Integrating A/d Converter
• Manufacturer: Thaler Corporation

POWER SUPPLIES
Pin 4 is -15V, pin 5 is +15v, pin 6 is +5V and pin 7 is
GND.
OUTPUT DATA LINES
13-20. Pin 20 is the Most Significant Bit and pin 13
the Least Significant Bit. The data lines go to a high
impedance state when the Output Enable line is at a
logic one level.
OUTPUT ENABLE (PIN 21)
zero on this line.
CONVERT (Pin22)
to retrieve the output data. The status lines indicate
which function will be executed.
(transition from logic one to logic zero) starts the
conversion cycle. Two subsequent pulses are used
to place the lower two bytes on the Output Data
Lines.
STATUS LINES (Pins 23, 24)
conversion cycle the Status Lines go to logic zero, indicating that a conversion cycle is in progress. When
the conversion is complete the microprocessor places the MSB of the output data in the output buffer and
then raises S
When the Convert Line is pulsed again the middle byte of the output data is placed in that output buffer and
S
and both status lines go to the logic one. The converter is now ready for the next conversion cycle.
The power supply lines are connected to pins 4-7.
The output data is available in byte form on pins
This line is used to initiate a conversion cycle and
These lines indicate the present state of the ADC. When the Convert line receives the first pulse in a
Data is placed on the Output Data Lines by a logic
The table below shows a summary of the status code.
1
changes to logic one and S
0
to a logic one, indicating that the MSB at the output data is available in the output buffer.
The output data is represented in BOB (Bipolar Offset Binary)
format. One LSB is scaled to be exactly 5mV. The table below
shows the output data codes for zero and plus-minus full scale
input voltage.
+10.485755 V
-10.485760 V
Input Voltage
CONNECTING THE ADC100
S
OUTPUT DATA REPRESENTATION
0
0
0
1
1
1
to logic zero. The third pulse places the LSB of the output data in the buffer
0.0 V
S
0
1
0
1
The first pulse
0
Conversion in progress.
Conversion complete. MSB in output.
Middle byte in output register.
LSB in output. Ready for next conversion.
High Byte
3F
00
20
Output Data
Middle Byte
AUTO-ZERO / RESET (Pin 29)
3 by internally connecting the analog high to analog
low. Since the µP is reset the status lines S1 and
S0 are tristate before going to the low position. The
status lines will remain low until the autozero is
complete.
INTEGRATION CAPACITOR (Pin 34, 35)
to these pins. Lead length should be as short as
possible and not exceed 2".
ANALOG INPUTS (Pin 39, 40)
have a common mode rejection of approximately
80dB. min. To maintain the full accuracy at the
ADC it is recommended to keep the input to analog
common to less than 0.1VDC.
A logic zero on this input will autozero the ADC150-
A .68 µF polystyrene capacitor must be connected
Both analog inputs are buffered by op-amps and
FF
00
00
Low Byte
FF
00
00
ADC100DS REV. E MAR 00