adc10732 National Semiconductor Corporation, adc10732 Datasheet - Page 8

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adc10732

Manufacturer Part Number
adc10732
Description
10-bit Plus Sign Serial I/o A/d Converters With Mux, Sample/hold And Reference
Manufacturer
National Semiconductor Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
adc10732CIWM
Manufacturer:
NS/国半
Quantity:
20 000
www.national.com
Electrical Characteristics
Note 6: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 7: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 8: Two on-chip diodes are tied to each analog input as shown below. They will forward-conduct for analog input voltages one diode drop below ground or one
diode drop greater than V
especially at elevated temperatures, which will cause errors In the conversion result. The specification allows 50 mV forward bias of either diode; this means that
as long as the analog V
will corrupt the reading of a selected channel. If AV
Note 9: No connection exists between AV
To guarantee accuracy, it is required that the AV
Note 10: One LSB is referenced to 10 bits of resolution.
Note 11: Typicals are at T
Note 12: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 13: Total unadjusted error includes offset, full-scale, linearity, multiplexer, and hold step errors.
Note 14: The DC common-mode error is measured in the differential multiplexer mode with the assigned positive and negative input channels shorted together.
Note 15: Channel leakage current is measured after the channel selection.
Note 16: All the timing specifications are tested at the TTL logic levels, V
to 1.4V.
Note 17: The voltage applied to the digital inputs will affect the current drain during power down. These devices are tested with CMOS logic levels (logic Low = 0V
and logic High = 5V). TTL levels increase the current, during power down, to about 300 µA.
IN
does not exceed the supply voltage by more than 50 mV, the output code will be correct. Exceeding this range on an unselected channel
+
J
= T
supply. Be careful during testing at low V
A
= 25˚C and represent most likely parametric norm.
ADC10731CIWM
ADC10732CIWM
ADC10734CIMSA
ADC10734CIWM
ADC10738CIWM
+
and DV
Part Number
+
and DV
+
+
and DV
on the chip.
(Continued)
+
be connected together to a power supply with separate bypass filter at each V
+
are minimum (4.5 V
Thermal Resistance
+
levels (+4.5V), as high level analog inputs (+5V) can cause an input diode to conduct,
IL
= 0.8V for a falling edge and V
134˚C/W
90˚C/W
80˚C/W
80˚C/W
75˚C/W
8
DC
) and full scale must be ≤+4.55 V
Package Type
MSA20
M16B
M20B
M20B
M24B
01139006
IH
= 2.0V for a rising. TRl-STATE voltage level is forced
DC
.
+
pin.

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