cs5157h ON Semiconductor, cs5157h Datasheet - Page 13

• Manufacturer Part Number: cs5157h
• Description: Cpu 5-bit Synchronous Buck Controller
• Manufacturer: ON Semiconductor

reduce their thermal impedance. A number of PC board
layout techniques such as thermal vias and additional copper
foil area can be used to improve the power handling
capability of surface mount components.
EMI Management
at high frequency, switching regulators generate noise as a
consequence of their normal operation. When designing for
compliance
components may be added to reduce noise emissions. These
components are not required for regulator operation and
experimental results may allow them to be eliminated. The
input filter inductor may not be required because bulk filter and
bypass capacitors, as well as other loads located on the board
will tend to reduce regulator di/dt effects on the circuit board
and input power supply. Placement of the power component to
minimize routing distance will also help to reduce emissions.
A heatsink may be added to TO−220 components to
As a consequence of large currents being turned on and off
Figure 20. Filter Components
with
1200 pF × 3.0/16 V
Figure 21. Input Filter
EMI/EMC
2.0 mH
33 W
1000 pF
2.0 mH
+
regulations,
additional
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CS5157H
13
Layout Guidelines
(pin 12 when used) with traces that are a minimum of 0.025
inches wide.
V
1.0 mF
COMP
Route gate drive signals V
1. Place 12 V filter capacitor next to the IC and connect
2. Connect pin 11 (PGND) with a separate trace to the
3. Place fast feedback filter capacitor next to pin 8 (V
4. Connect the ground terminals of the Compensation
5. Place the output filter capacitor(s) as close to the load
6. Connect the V
7. Place 5.0 V input capacitors close to the switching
capacitor ground to pin 11 (PGND).
ground terminals of the 5.0 V input capacitors.
and connect it’s ground terminal with a separate, wide
trace directly to pin 14 (LGND).
capacitor directly to the ground of the fast feedback
filter capacitor to prevent common mode noise from
effecting the PWM comparator.
as possible and connect the ground terminal to pin 14
(LGND).
trace (remote sense).
MOSFET and synchronous MOSFET.
To the negative terminal of the output capacitors
Figure 22. Layout Guidelines
Soft−Start
FB
0.1 mF
V
15
pin directly to the load with a separate
CC
GATE(H)
5
11
To the negative terminal
(pin 10) and V
of the input capacitors
OFF TIME
8
GATE(L)
100 pF
V
FFB
FFB
)