pca9655e ON Semiconductor, pca9655e Datasheet - Page 6

• Manufacturer Part Number: pca9655e
• Description: Pca9655e Remote 16-bit I/o Expander For I2c Bus With Interrupt
• Manufacturer: ON Semiconductor

8. t
9. t
10. C
11. A master device must internally provide a hold time of al least 300 ns for the SDA signal (refer to V
12. The maximum t
13. Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
Table 5. AC ELECTRICAL CHARACTERISTICS
PORT TIMING: C
INTERRUPT TIMING: C
t
RST(INT_N)
t
Symbol
the undefined region SCL’s falling edge.
This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding
the maximum specified t
t
t
t
t
t
t
t
V(INT_N)
VD:ACK
VD:DAT
VD:ACK
HD:STA
SU:STA
SU:STO
HD:DAT
VD:DAT
SU:DAT
t
t
t
b
t
t
SU(D)
t
f
HIGH
LOW
V(Q)
H(D)
SCL
BUF
t
SP
t
= total capacitance of one bus line in pF.
t
f
r
= minimum time for SDA data out to be valid following SCL LOW.
= time for Acknowledgment signal from SCL LOW to SDA (out) LOW.
SCL Clock Frequency
Bus−Free Time between a STOP and START
Condition
Hold Time (Repeated) START Condition
Setup Time for a Repeated START Condition
Setup Time for STOP Condition
Data Hold Time
Data Valid Acknowledge Time (Note 8)
Data Valid Time (Note 9)
Data Setup Time
LOW Period of SCL
HIGH Period of SCL
Fall Time of SDA and SCL (Notes 11 and 12)
Rise Time of SDA and SCL
Pulse Width of Spikes Suppressed by Input Filter
(Note 13)
Data Output Valid Time
Data Input Setup Time
Data Input Hold Time
Data Valid Time
Reset Delay Time
f
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t
L
v 100 pF (See Figures 6, 9 and 10)
L
f
v 100 pF (See Figures 9 and 10)
.
Parameter
(V
(V
(V
DD
DD
DD
= 1.65 V to 2.3 V)
= 4.5 V to 5.5 V)
= 2.3 V to 4.5 V)
V
http://onsemi.com
DD
= 1.65 V to 5.5 V; T
6
Min
300
250
100
4.7
4.0
4.7
4.0
0.3
4.7
4.0
0
0
1
Standard
Mode
1000
Max
3.45
A
300
200
350
550
0.1
50
4
4
= −55°C to +125°C, unless otherwise specified.
20 + 0.1C
20 + 0.1C
(Note 10)
(Note 10)
Min
100
100
1.3
0.6
0.6
0.6
0.1
1.3
0.6
Fast Mode
50
0
0
1
b
b
IL
of the SCL signal) in order to bridge
Max
300
300
200
350
550
0.4
0.9
50
4
4
Fast Mode +
0.26
0.26
0.26
0.05
0.26
Min
100
0.5
0.5
50
50
0
0
1
f
is specified at 250 ns.
Max
0.45
450
120
120
200
350
550
1.0
50
4
4
MHz
Unit
ms
ms
ms
ms
ns
ms
ns
ns
ms
ms
ns
ns
ns
ns
ns
ms
ms
ms