lm8328tmx National Semiconductor Corporation, lm8328tmx Datasheet - Page 9

• Manufacturer Part Number: lm8328tmx
• Description: Mobile I/o Companion Supporting Keyscan, I/o Expansion Pwm, And Access.bus Host Interface
• Manufacturer: National Semiconductor Corporation

9.0 Halt Mode
9.1 HALT MODE DESCRIPTION
The fully static architecture of the LM8328 allows stopping the
internal RC clock in Halt mode, which reduces power con-
sumption to the minimum level.
Halt mode at the maximum VCC (1.98V) from 25°C to +85°
C.
FIGURE 4. Halt Current vs. Temperature at 1.98V
Figure 4
shows the current in
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Halt mode is entered when no key-press event, key-release
event, or ACCESS.bus activity is detected for a certain period
of time (by default, 1020 milliseconds). The mechanism for
entering Halt mode is always enabled in hardware, but the
host can program the period of inactivity which triggers entry
into Halt mode using the autosleep function. (See
9.2 ACCESS.BUS ACTIVITY
When the LM8328 is in Halt mode, only activity on the
ACCESS.bus interface that matches its Slave Address will
cause the LM8328 to exit from Halt mode. However, the
LM8328 will not be able to acknowledge the first bus cycle
immediately following wake-up from Halt mode. It will respond
with a negative acknowledgement, and the host should then
repeat the cycle. A peripheral that is continuously active can
share the bus since this activity will not prevent the LM8328
from entering Halt mode.
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Table
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