cat5172 ON Semiconductor, cat5172 Datasheet - Page 9

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cat5172

Manufacturer Part Number
cat5172
Description
256-position Spi Compatible Digital Potentiometer
Manufacturer
ON Semiconductor
Datasheet

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following output resistance R
Wiper register codes.
dependent and may vary by up to ±20%.
SPI Compatible 3−Wire Serial Bus
digital interface (SDI, CS, and CLK).
transitions to avoid clocking incorrect data into the serial
input register. When CS is low, the clock loads data into the
serial register on each positive clock edge (Figure 1). Each
8−bit serial word must be loaded starting with the MSB. The
format of the word is shown in Table 6.
transferred to the internal Wiper register when the CS line
returns to logic high. Extra MSB bits are ignored.
ESD Protection
Table 8. CODES AND CORRESPONDING R
RESISTANCE FOR R
D (Dec.)
For R
Typical device to device resistance matching is lot
Control of CAT5172 is through a 3−wire SPI compatible
The CLK input is rising−edge sensitive and requires crisp
Data loaded into CAT5172’s 8−bit serial input register is
255
128
Digital
Input
1
0
AB
Figure 15. ESD Protection Networks
= 100 kW and the B terminal open circuited, the
R
100,050
50,050
99,659
WA
441
(W)
GND
GND
AB
Full Scale
Midscale
1 LSB
Zero Scale
= 100 kW, V
WA
Potentiometer
will be set for the indicated
LOGIC
Output State
DD
= 5 V
WA
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9
Terminal Voltage Operating Range
limits for proper 3−terminal digital potentiometer operation.
Signals or potentials applied to terminals A, B or the wiper
must remain inside the span of V
which attempt to go outside these boundaries will be
clamped by the internal forward biased diodes.
Power−up Sequence
compliance at terminals A, B, and W (see Figure 15), it is
recommended that V
any voltage to terminals A, B, and W. The ideal power−up
sequence is: GND, V
order of powering V
important as long as they are powered after V
Power Supply Bypassing
length layout design. Leads should be as direct as possible.
It is also recommended to bypass the power supplies with
quality low ESR Ceramic chip capacitors of 0.01 mF to
0.1 mF. Low ESR 1 mF to 10 mF tantalum or electrolytic
capacitors can also be applied at the supplies to suppress
transient disturbances and low frequency ripple. As a further
precaution digital ground should be joined remotely to the
analog ground at one point to minimize the ground bounce.
The CAT5172 V
Because ESD protection diodes limit the voltage
Good design practice employs compact, minimum lead
V
Figure 17. Power Supply Bypassing
DD
W, A, B
LOGIC
10 mF
GND
V
C
DD
3
DD
A
DD
+
DD
, V
and GND power supply define the
, digital inputs, and then V
Figure 16.
/GND be powered before applying
B
, V
0.1 mF
W
C
, and the digital inputs is not
1
DD
V
CAT5172
DD
and GND. Signals
CAT5172
GND
DD
A/B/W
/GND.
. The

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