epm2210gm100i Altera Corporation, epm2210gm100i Datasheet - Page 97
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epm2210gm100i
Manufacturer Part Number
epm2210gm100i
Description
Section I. Max Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EPM2210GM100I.pdf
(108 pages)
- Current page: 97 of 108
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Altera Corporation
July 2008
3.3-V LVTTL Without
3.3-V
LVCMOS
2.5-V LVTTL Without
1.8-V LVTTL Without
1.5-V LVTTL Without
3.3-V PCI
Table 5–27. External Timing Input Delay Adders
Standard
Schmitt Trigger
With
Schmitt Trigger
Without
Schmitt Trigger
With
Schmitt Trigger
Schmitt Trigger
With Schmitt
Trigger
Schmitt Trigger
Schmitt Trigger
Without
Schmitt Trigger
External Timing I/O Delay Adders
The I/O delay timing parameters for I/O standard input and output
adders, and input delays are specified by speed grade independent of
device density.
Tables 5–27
for all packages. The delay numbers for –3, –4, and –5 speed grades
shown in
target, while –6 and –7 speed grade values are based on an EPM570Z
device target. If an I/O standard other than 3.3-V LVTTL is selected, add
the input delay adder to the external t
Tables 5–23
with 16 mA drive strength and fast slew rate is selected, add the output
delay adder to the external t
5–26.
Min
—
—
—
—
—
—
—
—
—
–3 Speed
Grade
Max
334
334
339
291
681
23
Tables 5–27
0
0
0
through
through 5–26. If an I/O standard other than 3.3-V LVTTL
Min
–4 Speed
—
—
—
—
—
—
—
—
—
Grade
5–31
through
Max
434
434
441
378
885
30
0
0
0
show the adder delays associated with I/O pins
CO
Min
–5 Speed
—
—
—
—
—
—
—
—
—
5–33
and t
Grade
1,090
Max
are based on an EPM1270 device
535
535
543
466
PD
37
0
0
0
SU
shown in
MAX II Device Handbook, Volume 1
DC and Switching Characteristics
timing parameters shown in
Min
–6 Speed
—
—
—
—
—
—
—
—
—
Grade
Max
Tables 5–23
387
387
429
378
681
42
0
0
0
Min
—
—
—
—
—
—
—
—
—
–7 Speed
Grade
through
Max
434
434
476
373
622
43
0
0
0
5–27
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
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