ep1c6t144i8es Altera Corporation, ep1c6t144i8es Datasheet - Page 54

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ep1c6t144i8es

Manufacturer Part Number
ep1c6t144i8es
Description
Cyclone Fpga Family
Manufacturer
Altera Corporation
Datasheet
Cyclone FPGA Family Data Sheet
Figure 34. DDR SDRAM & FCRAM Interfacing
54
PLL
OE
Phase Shifted -90 ˚
Register
OE LE
Register
OE LE
GND
V
CC
Output LE
Output LE
Figure 34
through the dedicated circuitry to the logic array.
Register
Register
Programmable
Delay Chain
clk
DQS
illustrates DDR SDRAM and FCRAM interfacing from the I/O
t
OE
Register
OE LE
Global Clock
Register
OE LE
DataA
DataB
Output LE
Output LE
Registers
Registers
-90˚ clk
DQ
Adjacent LAB LEs
Register
Register
LE
LE
Registers
Registers
Input LE
Input LE
Preliminary Information
Altera Corporation
Adjacent
LAB LEs
Resynchronizing
Global Clock

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