at94k10al ATMEL Corporation, at94k10al Datasheet - Page 15

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at94k10al

Manufacturer Part Number
at94k10al
Description
At94k05al 5k - 40k Gates Of At40k Fpga With 8-bit Microcontroller, Up To 36k Bytes Of Sram And On-chip Jtag Ice
Manufacturer
ATMEL Corporation
Datasheet

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1138I–FPSLI–1/08
The FPGA clocks from the AVR are effected differently in the various sleep modes of the AVR,
see
The source clock into the FPGA GCK5 and GCK6 will determine what happens during the vari-
ous power-down modes of the AVR.
If the XTAL clock input is used as an FPGA clock (GCK5 or GCK6) in Idle mode, it will still be
running. In Power-down/save mode the XTAL clock input will be off.
If the TOSC clock input is used as an FPGA clock (GCK6) in Idle mode, it will still be running in
Power-save mode but will be off in Power-down mode.
If the Watchdog Timer is used as an FPGA clock (GCK6) and was enabled in the AVR, it will be
running in all sleep modes.
Table 2-1.
Mode
Idle
Power-save
Power-down
Table
2-1.
Clock Activity in Various Modes
Clock Source
XTAL
TOSC
WDT
XTAL
TOSC
WDT
XTAL
TOSC
WDT
GCK5
Active
Not Available
Not Available
Inactive
Not Available
Not Available
Inactive
Not Available
Not Available
AT94KAL Series FPSLIC
GCK6
Active
Active
Active
Inactive
Active
Active
Inactive
Inactive
Active
15

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