pic16c62b-20i-ss Microchip Technology Inc., pic16c62b-20i-ss Datasheet - Page 33

• Manufacturer Part Number: pic16c62b-20i-ss
• Description: 28-pin 8-bit Cmos Microcontrollers
• Manufacturer: Microchip Technology Inc.

7.0
The CCP (Capture/Compare/PWM) module contains a
16-bit register, which can operate as a 16-bit capture
register, as a 16-bit compare register or as a PWM
master/slave duty cycle register. Table 7-1 shows the
timer resources of the CCP module modes.
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 7-2
REGISTER 7-1:CCP1CON REGISTER (ADDRESS 17h)
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
1999 Microchip Technology Inc.
bit7
bit 7-6: Unimplemented: Read as '0'
bit 5-4: CCP1X:CCP1Y: PWM Least Significant bits
bit 3-0: CCP1M3:CCP1M0: CCP1 Mode Select bits
U-0
—
CAPTURE/COMPARE/PWM
(CCP) MODULE
U-0
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
0000 = Capture/Compare/PWM off (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected)
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D
11xx = PWM mode
—
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
CCP1X CCP1Y CCP1M3
R/W-0
conversion (if A/D module is enabled))
The compare should be configured for the special event trigger, which clears TMR1.
Same TMR1 time-base.
The compare(s) should be configured for the special event trigger, which clears TMR1.
The PWMs will have the same frequency and update rate (TMR2 interrupt).
None.
None.
R/W-0
R/W-0
CCP1M2
Preliminary
R/W-0
CCP1M1 CCP1M0
R/W-0
Additional information on the CCP module is available
in the PICmicro™ Mid-Range Reference Manual,
(DS33023).
TABLE 7-1
Interaction
CCP Mode
Compare
Capture
PWM
R/W-0
PIC16C62B/72A
bit0
CCP MODE - TIMER
RESOURCE
R = Readable bit
W = Writable bit
U = Unimplemented bit, read
- n =Value at POR reset
as ‘0’
Timer Resource
DS35008B-page 33
Timer1
Timer1
Timer2