mc68hc908qz16 Freescale Semiconductor, Inc, mc68hc908qz16 Datasheet - Page 259

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mc68hc908qz16

Manufacturer Part Number
mc68hc908qz16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
19.4.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM status and control register
select the TIM clock source.
19.4.2 Input Capture
With the input capture function, the TIM can capture the time at which an external event occurs. When an
active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter
into the TIM channel registers, TCHxH:TCHxL. The polarity of the active edge is programmable. Input
captures can generate TIM CPU interrupt requests.
Freescale Semiconductor
Addr.
$002D
$002E
$002F
$0030
$0031
$0032
$0033
$0034
$0035
Timer 2 Channel 0 Status and
Timer 2 Channel 1 Status and
Control Register (T2SC0)
Control Register (T2SC1)
Register High (T2MODH)
Register High (T2CH0H)
Register High (T2CH1H)
Timer 2 Counter Modulo
Timer 2 Counter Modulo
Register Low (T2MODL)
Register Low (T2CNTL)
Register Low (T2CH0L)
Register Low (T2CH1L)
Register Name
Timer 2 Channel 0
Timer 2 Channel 0
Timer 2 Channel 1
Timer 2 Channel 1
Timer 2 Counter
See page 266.
See page 267.
See page 267.
See page 267.
See page 270.
See page 270.
See page 267.
See page 270.
See page 270.
Figure 19-3. TIM I/O Register Summary (Sheet 2 of 2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
CH0F
Bit 15
CH1F
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
1
1
0
0
0
0
= Unimplemented
CH0IE
CH1IE
14
14
14
6
6
0
1
6
1
0
6
0
6
MS0B
13
13
13
5
5
0
1
5
1
0
5
0
0
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MS0A
MS1A
12
12
12
4
4
0
1
4
1
0
4
0
4
ELS0B
ELS1B
11
11
11
3
3
0
1
3
1
0
3
0
3
ELS0A
ELS1A
10
10
10
2
2
0
1
2
1
0
2
0
2
Functional Description
TOV0
TOV1
1
1
0
9
1
1
1
0
9
1
0
9
1
CH0MAX
CH1MAX
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
1
1
0
0
259

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