mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 82

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
10.4.4.2 Bit Stuffing
In order to ensure adequate signal transitions, bit stuffing is employed by the
transmitting device when sending a packet on the USB (see Figure 10-18 and
Figure 10-19). A 0 is inserted after every six consecutive 1’s in the data stream
before the data is NRZI encoded to force a transition in the NRZI data stream.
This gives the receiver logic a data transition at least once every seven bit times to
guarantee the data and clock lock. The receiver must decode the NRZI data,
recognize the stuffed bits, and discard them. Bit stuffing is enabled beginning with
the Sync Pattern and throughout the entire transmission. The data “one” that ends
the Sync Pattern is counted as the first one in a sequence. Bit stuffing is always
enforced, without exception. If required by the bit stuffing rules, a zero bit will be
inserted even if it is the last bit before the end-of-packet (EOP) signal.
ENCODED
STUFFED
NRZI
DATA
RAW
DATA
DATA
BIT
IDLE
Freescale Semiconductor, Inc.
For More Information On This Product,
UNIVERSAL SERIAL BUS MODULE
Figure 10-18. Bit Stuffing
SYNC PATTERN
SYNC PATTERN
SYNC PATTERN
Go to: www.freescale.com
February 24, 1999
SIX ONES
PACKET DATA
PACKET DATA
PACKET DATA
STUFFED BIT
REV