mc68hc11k4 Freescale Semiconductor, Inc, mc68hc11k4 Datasheet - Page 160
mc68hc11k4
Manufacturer Part Number
mc68hc11k4
Description
Mc68hc11k1 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC11K4.pdf
(290 pages)
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Serial Communications Interface (SCI)
7.9.2 Serial Communications Control Register 1
Technical Data
160
Address $0072
LOOPS — SCI Loop Mode Enable Bit
WOMS — Wired-OR Mode for SCI Pins PD[1:0] Bits
M — Mode (SCI Word Size) Bit
WAKE — Wakeup Mode Bit
ILT — Idle Line Type Bit
Reset:
Read:
Write:
Both the transmitter and receiver must be enabled to use the loop
mode. When the loop mode is enabled, the TxD pin is driven high (idle
line state) if the transmitter is enabled.
See also
of the DWOM (port D wired-OR mode) bit in the serial peripheral
control register (SPCR).
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = SCI transmit and receive operate normally.
1 = SCI transmit and receive are disconnected from TxD and RxD
0 = TxD and RxD operate normally.
1 = TxD and RxD are open drains if operating as outputs.
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
0 = Wake up by idle line recognition
1 = Wake up by address mark (most significant data bit set)
0 = Short (SCI counts consecutive 1s after start bit.)
1 = Long (SCI counts one only after stop bit.)
U = Undefined
LOOPS
Serial Communications Interface (SCI)
Bit 7
pins, and transmitter output is fed back into the receiver input.
U
Figure 7-7. SCI Control Register 1 (SCCR1)
8.6.1 Serial Peripheral Control Register
Go to: www.freescale.com
WOMS
U
6
5
0
0
M
4
0
WAKE
3
0
ILT
2
0
for a description
M68HC11K Family
PE
1
0
MOTOROLA
Bit 0
PT
0
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