mc68hc711k4 Freescale Semiconductor, Inc, mc68hc711k4 Datasheet - Page 39

• Manufacturer Part Number: mc68hc711k4
• Description: Hcmos Microcontroller Unit
• Manufacturer: Freescale Semiconductor, Inc

2.9 Mode Selection, Instruction Cycle Reference, and Standby Power
M68HC11K Family
MOTOROLA
(MODA/LIR and MODB/V
CAUTION:
Mode Selection, Instruction Cycle Reference, and Standby Power (MODA/LIR and MODB/VSTBY)
required for wire-OR configuration. Software can change the triggering
to edge sensitive.
XIRQ interrupts can be non-maskable after reset initialization. Out of
reset, the X bit in the CCR is set, masking XIRQ interrupts. Once
software clears the X bit, it cannot be reset, and the XIRQ interrupts
become non-maskable. The XIRQ input is level sensitive only. XIRQ is
often used as a power-loss detect interrupt.
Whenever IRQ or XIRQ is used with multiple interrupt sources, each
source must drive the interrupt input with an open-drain type of driver to
avoid contention between outputs. There should be a single pullup
resistor near the MCU interrupt pin (typically 4.7 k ). There must also be
an interlock mechanism at each interrupt source which holds the
interrupt line low until the MCU recognizes and acknowledges the
interrupt request. If any interrupt sources are still pending after the MCU
services a request, the interrupt line will remain low, interrupting the
MCU again as soon as the I bit in the MCU is cleared (normally upon
return from an interrupt). Interrupt mechanisms are explained further in
Section 5. Resets and
On EPROM devices, the XIRQ pin also functions as the high-voltage
supply, V
Ensure that the voltage level at this pin is equal to V
operation to avoid programming accidents.
During reset, MODA and MODB select one of four operating modes:
For full descriptions of these modes, refer to
1. Single-chip
2. Expanded
3. Bootstrap
4. Special test
Freescale Semiconductor, Inc.
For More Information On This Product,
PP
, during EPROM or OTPROM programming.
STBY
Go to: www.freescale.com
Pin Description
)
Interrupts.
4.5 Operating
DD
during normal
Pin Description
Technical Data
Modes.
39