mpc8378 Freescale Semiconductor, Inc, mpc8378 Datasheet - Page 59

• Manufacturer Part Number: mpc8378
• Description: Powerquicc Ii Pro Processor
• Manufacturer: Freescale Semiconductor, Inc

PCI_SYNC_IN clock input levels are with next levels: VIL = 0.1 × OV
Table 50
Freescale Semiconductor
PCI_SYNC_IN clock input levels are with next levels: VIL = 0.1 × OV
Input hold from Clock
Output Clock Skew
Notes:
1
2
3
4
5
6
Clock to output valid
Output hold from Clock
Clock to output high impedance
Input setup to Clock
Input hold from Clock
Output Clock skew
Note:
1
2
3
4
5
6
Note that the symbols used for timing specifications herein follow the pattern of t
(reference)(state)
symbolizes PCI timing (PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN
clock, t
the time hard reset (R) went high (H) relative to the frame signal (F) going to the valid (V) state.
See the timing measurement conditions in the PCI 2.3 Local Bus Specifications .
For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
Input timings are measured at the pin.
PCI specifications allows 1 ns skew for 66 MHz but includes the total allowed skew, board, connectors, etc.
Value does not comply with the PCI 2.3 Local Bus Specifications .
Note that the symbols used for timing specifications herein follow the pattern of t
(reference)(state)
symbolizes PCI timing (PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN
clock, t
the time hard reset (R) went high (H) relative to the frame signal (F) going to the valid (V) state.
See the timing measurement conditions in the PCI 2.3 Local Bus Specifications .
For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
Input timings are measured at the pin.
PCI specifications allows 2 ns skew for 33 MHz but includes the total allowed skew, board, connectors, etc.
Value does not comply with the PCI 2.3 Local Bus Specifications .
SYS
SYS
shows the PCI AC timing specifications at 33 MHz.
, reference (K) going to the high (H) state or setup time. Also, t
, reference (K) going to the high (H) state or setup time. Also, t
for inputs and t
for inputs and t
Parameter
Parameter
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
Table 49. PCI AC Timing Specifications at 66 MHz (continued)
(first two letters of functional block)(reference)(state)(signal)(state)
(first two letters of functional block)(reference)(state)(signal)(state)
Table 50. PCI AC Timing Specifications at 33 MHz
Symbol
t
Symbol
t
t
t
t
PCKOSK
PCKHOV
t
PCKHOX
PCIXKH
t
t
PCKHOZ
PCKOSK
PCIVKH
PCIXKH
DD
DD
, VIH = 0.7 × OV
, V
1
1
IH
= 0.7 × OV
0.25
PCRHFV
Min
PCRHFV
0.25
Min
—
3.0
—
—
—
DD
2
DD
.
.
(first two letters of functional block)(signal)(state)
symbolizes PCI timing (PC) with respect to
symbolizes PCI timing (PC) with respect to
(first two letters of functional block)(signal)(state)
for outputs. For example, t
for outputs. For example, t
Max
0.5
—
Max
0.5
11
14
—
—
—
Unit
ns
ns
Unit
ns
ns
ns
ns
ns
ns
PCIVKH
PCIVKH
Notes
2, 4, 6
Notes
2, 4, 6
2, 3
2, 4
5
2
2
5
PCI
59