mpc880 Freescale Semiconductor, Inc, mpc880 Datasheet - Page 42

• Manufacturer Part Number: mpc880
• Description: Mpc885 Powerquicc Integrated Communications Processor
• Manufacturer: Freescale Semiconductor, Inc

Bus Signal Timing
Table 14
42
Num
R45
R46
R47
R48
R49
R50
R51
R52
R53
R54
R55
R56
R57
P44
CLKOUT to HRESET high impedance
(MAX = 0.00 × B1 + 20.00)
CLKOUT to SRESET high impedance
(MAX = 0.00 × B1 + 20.00)
RSTCONF pulse width
(MIN = 17.00 × B1)
Configuration data to HRESET rising
edge setup time
(MIN = 15.00 × B1 + 50.00)
Configuration data to RSTCONF rising
edge setup time
(MIN = 0.00 × B1 + 350.00)
Configuration data hold time after
RSTCONF negation
(MIN = 0.00 × B1 + 0.00)
Configuration data hold time after
HRESET negation
(MIN = 0.00 × B1 + 0.00)
HRESET and RSTCONF asserted to
data out drive
(MAX = 0.00 × B1 + 25.00)
RSTCONF negated to data out high
impedance (MAX = 0.00 × B1 + 25.00)
CLKOUT of last rising edge before chip
three-states HRESET to data out high
impedance (MAX = 0.00 × B1 + 25.00)
DSDI, DSCK setup (MIN = 3.00 × B1)
DSDI, DSCK hold time
(MIN = 0.00 × B1 + 0.00)
SRESET negated to CLKOUT rising
edge for DSDI and DSCK sample
(MIN = 8.00 × B1)
shows the reset timing for the MPC885/MPC880.
Characteristic
MPC885/MPC880 PowerQUICC™ Hardware Specifications, Rev. 4
—
Table 14. Reset Timing
515.20
504.50
350.00
242.40
90.90
0.00
0.00
0.00
Min
—
—
—
—
—
—
33 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
425.00
425.00
350.00
200.00
75.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
40 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
257.60
277.30
350.00
121.20
45.50
0.00
0.00
0.00
Min
—
—
—
—
—
—
66 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
212.50
237.50
350.00
100.00
37.50
0.00
0.00
0.00
Min
—
—
—
—
—
—
80 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns