mpc5643l Freescale Semiconductor, Inc, mpc5643l Datasheet

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mpc5643l

Manufacturer Part Number
mpc5643l
Description
Mpc5643l Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Data Sheet: Advance Information
MPC5643L Microcontroller
Data Sheet
• High-performance e200z4d dual core
• Memory available
• SIL3/ASILD innovative safety concept: LockStep mode
• Decoupled Parallel mode for high performance use of
• Nexus Class 3+ interface
• Interrupts
© Freescale Semiconductor, Inc., 2009. All rights reserved.
Preliminary—Subject to Change Without Notice
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
– 32-bit Power Architecture™ Book E CPU
– Core frequency as high as 120 MHz
– Dual issue five-stage pipeline core
– Variable Length Encoding (VLE)
– Memory Management Unit (MMU)
– 4 KB instruction cache with error detection code
– Signal processing engine (SPE)
– 1 MB Flash memory with ECC
– Built-in RWW capabilities for EEPROM emulation
– As much as 128 KB on-chip RAM with ECC
and Fail-safe protection
– Sphere of replication (SoR) for key components (such as
– Fault collection and control unit (FCCU)
– Redundancy control and checker unit (RCCU) on
– Boot-time Built-In Self-Test for Memory (MBIST) and
– Boot-time Built-In Self-Test for ADC and flash memory
– Replicated safety enhanced watchdog
– Replicated junction temperature sensor
– Non-maskable interrupt (NMI)
– 16-region memory protection unit (MPU)
– Clock monitoring units (CMU)
– Power management unit (PMU)
– Cyclic redundancy check (CRC) unit
replicated cores
– Replicated 16-priority controller
– Replicated 16-channel eDMA controller
CPU core, DMA, crossbar switch)
outputs of the SoR connected to FCCU
Logic (LBIST) triggered by hardware
triggered by software
• GPIOs individually programmable as input, output or
• Three 6-channel general-purpose eTimer units
• Two FlexPWM units
• Communications interfaces
• Two 12-bit analog-to-digital converters (ADCs)
• Sine wave generator (D/A with low pass filter)
• On-chip CAN/UART/FlexRay Bootstrap loader
• Single 3.0 V to 3.6 V voltage supply
• Ambient temperature range –40 °C to 125 °C
• Junction temperature range –40 °C to 150 °C
special function
– Four 16-bit channels per module
– Two LINFlex channels
– Three DSPI channels with automatic chip select
– Two FlexCAN interfaces (2.0B Active) with 32 message
– FlexRay module (V2.1) with dual channel, up to 64
– 16 input channels
– Programmable cross triggering unit (CTU) to
generation
objects
message objects and speed as fast as 10 Mbit/s
synchronize ADCs conversion with timer and PWM
20 x 20 x 1.4 mm
LQFP 144
MPC5643L
Document Number: MPC5643L
14 x 14 x 1.4 mm
257 MAPBGA
Rev. 3, 10/2009

Related parts for mpc5643l

mpc5643l Summary of contents

Page 1

... This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2009. All rights reserved. Preliminary—Subject to Change Without Notice Document Number: MPC5643L MPC5643L LQFP 144 1 1.4 mm • ...

Page 2

... AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . 79 3.17.1 RESET pin characteristics . . . . . . . . . . . . . . . . 79 3.17.2 IEEE 1149.1 interface timing . . . . . . . . . . . . . . 80 3.17.3 Nexus timing 3.17.4 External interrupt timing (IRQ pin 3.17.5 FlexCAN timing . . . . . . . . . . . . . . . . . . . . . . . . 85 3.17.6 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 4 Package characteristics 4.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . 92 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 6 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 MPC5643L Microcontroller Data Sheet, Rev. 3 junction temperature Freescale Semiconductor ...

Page 3

... This document provides electrical specifications, pin assignments, and package diagrams for the MPC5643L series of microcontroller units (MCUs). For functional characteristics, refer to the MPC5643L Microcontroller Reference Manual. For use of the MPC5643Lin a fail-safe system according to safety standard IEC 61508, refer to the MPC5643LSafety Application Guide. ...

Page 4

... Overview Table 1. MPC5643L device summary (continued) Feature Memory Code/data flash Static RAM Modules Interrupt controller Periodic Interrupt Timer (PIT) System timer module Software watchdog timer eDMA FlexRay FlexCAN LINFlex (UART and LIN) Clock out Fault control & collection unit (FCCU) Cross triggering unit (CTU) ...

Page 5

... Table 1. MPC5643L device summary (continued) Feature Packages Known Good Die (KGD) LQFP MAPBGA Temperature Temperature range (junction) Ambient temperature range using external ballast transistor (LQFP) Ambient temperature range using external ballast transistor (BGA) NOTES: 1 The third eTimer is available only in the BGA package. ...

Page 6

... Overview 1.2 Block diagram Figure 1 shows a top-level block diagram of the MPC5643L device. PMU SWT ECSM STM INTC SEMA4 DMA Crossbar Switch Memory Protection Unit ECC logic for SRAM AIPS Bridge TSENS ADC – Analog-to-Digital Converter AIPS – AHB to IP Slave Bus bridge BAM – ...

Page 7

... Support for vectorized mode: as many as two floating-point instructions per clock • Vectored interrupt support • Reservation instruction to support read-modify-write constructs • Extensive system development and tracing support via Nexus debug port Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Overview 7 ...

Page 8

... DMA task initiated either by hardware requestor or by software • Each DMA task can optionally generate an interrupt at completion and retirement of the task • Signal to indicate closure of last minor loop 8 Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 9

... On-chip SRAM with ECC The MPC5643L SRAM provides a general-purpose single port memory. ECC handling is done on a 32-bit boundary for data and it is extended to the address to have the highest possible diagnostic coverage including the array internal address decoder. ...

Page 10

... TBD RAM 64-bit write (executed 32-bit writes) RAM 8-,16-bit write TBD (Read-modify-Write for ECC) TBD Flash prefetch buffer hit (page hit) Flash prefetch buffer miss (includes 1-cycle of program flash TBD controller arbitration) MPC5643L Microcontroller Data Sheet, Rev. 3 Description Freescale Semiconductor ...

Page 11

... Priority elevation for shared resource The INTC is replicated for each processor. Freescale Semiconductor Preliminary—Subject to Change Without Notice Data Phase Wait States TBD Peripheral Bridge read TBD Peripheral Bridge write MPC5643L Microcontroller Data Sheet, Rev. 3 Overview Description 11 ...

Page 12

... Allows to run motor control periphery at different (precisely lower, equal or higher as required) frequency than the system to ensure higher resolution 1.3.15 Main oscillator The main oscillator provides these features: 12 Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 13

... Up-counter with four output compare registers • OS task protection and hardware tick implementation per AutoSar requirement The STM is replicated for each processor. 1.3.20 Software Watchdog Timer (SWT) This module implements the following features: Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Overview 13 ...

Page 14

... Supports programmable 64-bit password protection for serial boot mode • Supports serial bootloading of either classic PowerPC Book E code (default) or Freescale VLE code • Automatic switch to serial boot mode if internal flash memory is blank or invalid 14 Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 15

... Eight mailboxes configurable as a 6-entry receive FIFO — Eight programmable acceptance filters for receive FIFO • Programmable clock source — System clock — Direct oscillator clock to avoid PLL jitter Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Overview 15 ...

Page 16

... Interrupt driven operation with four interrupt sources — Separate transmitter and receiver CPU interrupt sources — 16-bit programmable baud-rate modulus counter and 16-bit fractional — Two receiver wake-up methods • Support for DMA enabled transfers 16 Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 17

... Serial Peripheral Interface module (DSPI) The serial peripheral interface (DSPI) block provides a synchronous serial interface for communication between the MPC5643L and external devices. A DSPI module provides these features: • Full duplex, synchronous transfers • Master or slave operation • Programmable master bit rates • ...

Page 18

... A customized digital-to-analog converter is available to generate a sine wave based on 32 stored values for external devices (ex: resolver). • Frequency range from 1 kHz to 50 kHz • Sine wave amplitude from 0. 2. Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 19

... Double buffered global trigger unit allowing eTimer synchronization and/or ADC command generation • Double buffered ADC command list pointers to minimize ADC-trigger unit update • Double buffered ADC conversion command list with as many as 24 ADC commands Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Overview 19 ...

Page 20

... JTAG only mode using only the JTAG pins. The following features are implemented: • Full and reduced port modes 20 Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev Freescale Semiconductor ...

Page 21

... TAP controller state machine that controls the operation of the data registers, instruction register and associated circuitry 1. Four MDO pins on 144 LQFP package, 12 MDO pins on 257 MAPBGA package. Freescale Semiconductor Preliminary—Subject to Change Without Notice 1 MPC5643L Microcontroller Data Sheet, Rev. 3 Overview 21 ...

Page 22

... Run-time Built-In Self Test of LVDs 2 Package pinouts and signal descriptions 2.1 Package pinouts Figure 2 shows the MPC5643L in the 144 LQFP package. 22 Preliminary—Subject to Change Without Notice Figure 3 shows the MPC5643L in the 257 MAPBGA package. MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 23

... XTAL EXTAL 30 31 RESET 32 D[8] 33 D[5] 34 D[6] VSS_LV_PLL0_PLL1 35 36 VDD_LV_PLL0_PLL1 Figure 2. MPC5643L 144 LQFP pinout (top view) Freescale Semiconductor Preliminary—Subject to Change Without Notice 144 LQFP package MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 108 A[4] 107 VPP_TEST F[12] 106 D[14] 105 104 ...

Page 24

... Figure 3. MPC5643L 257 MAPBGA pinout (top view) Table 3 provides the concatenated pin names (pin muxing) for the pins shown in the pin. Table 3 provides the concatenated ball names (pin muxing) for the pins shown in group for the pin. For more information, see 24 Preliminary— ...

Page 25

... F[10] / siul_GPIO[90] / npc_wrapper_EVTO 25 L2 F[11] / siul_GPIO[91] / leo_sor0_EVTI Freescale Semiconductor Preliminary—Subject to Change Without Notice Table 3. Concatenated pin names Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions Figure 2 and the balls shown in Figure Table 3 lists the Figure 3, including the functional group. ...

Page 26

... E[6] / siul_GPIO[70 B[8] / siul_GPIO[24] / etimer0_ETC[ E[7] / siul_GPIO[71 E[2] / siul_GPIO[66 DD_HV_ADR0 SS_HV_ADR0 52 U7 B[9] / siul_GPIO[25 B[10] / siul_GPIO[26 B[11] / siul_GPIO[27 B[12] / siul_GPIO[28 DD_HV_ADR1 SS_HV_ADR1 DD_HV_ADV 26 Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 27

... A[2] / siul_GPIO[2] / etimer0_ETC[2] / flexpwm0_A[3] / dspi2_SIN / mc_rgm_ABS[ N16 siul_EIRQ[2] 85 N17 G[5] / siul_GPIO[101] / flexpwm0_X[3] / dspi2_CS3 86 M15 B[5] / siul_GPIO[21] / jtagc_TDI 87 M16 TMS 88 L15 TCK 89 L17 B[4] / siul_GPIO[20] / jtagc_TDO 4 90 VSS_HV V SS_HV_IO Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 27 ...

Page 28

... E[13] / siul_GPIO[77] / etimer0_ETC[5] / dspi2_CS3 / siul_EIRQ[25] 118 A13 A[10] / siul_GPIO[10] / dspi2_CS0 / flexpwm0_B[0] / flexpwm0_X[2] / siul_EIRQ[9] 119 B12 E[14] / siul_GPIO[78] / etimer1_ETC[5] / siul_EIRQ[26] 120 D11 A[11] / siul_GPIO[11] / dspi2_SCK / flexpwm0_A[0] / flexpwm0_A[2] / siul_EIRQ[10] 121 B11 E[15] / siul_GPIO[79] / dspi0_CS1 / siul_EIRQ[27] 28 Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 29

... The XTAL and EXTAL pins have different functions from the pins with these names on the MPC5604P should always be tied to ground (V PP_TEST Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names ) for normal operations. SS MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 29 ...

Page 30

... E[15] / siul_GPIO[79] / dspi0_CS1 / siul_EIRQ[27] B12 E[14] / siul_GPIO[78] / etimer1_ETC[5] / siul_EIRQ[26] B13 B[3] / siul_GPIO[19] / sscm_DEBUG[3] / lin0_RXD B14 F[13] / siul_GPIO[93] / etimer1_ETC[4] / siul_EIRQ[31] B15 B[0] / siul_GPIO[16] / can0_TXD / etimer1_ETC[2] / sscm_DEBUG[0] / siul_EIRQ[15] B16 V DD_HV_IO_RING B17 V SS_HV_IO_RING 30 Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 31

... E[13] / siul_GPIO[77] / etimer0_ETC[5] / dspi2_CS3 / siul_EIRQ[25] D13 F[15] / siul_GPIO[95] / lin1_RXD D14 V DD_HV_IO_RING 2 D15 V PP_TEST D16 D[14] / siul_GPIO[62] / flexpwm0_B[1] / etimer0_ETC[3] D17 G[3] / siul_GPIO[99] / flexpwm0_A[2] / etimer0_ETC[4] E1 MDO0 Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 31 ...

Page 32

... DD_LV_CORE_RING F11 V DD_LV_CORE_RING F12 V DD_LV_CORE_RING 3 F13 NP 1 F14 NC F15 C[13] / siul_GPIO[45] / etimer1_ETC[1] / ctu0_EXT_IN / flexpwm0_EXT_SYNC F16 I[2] / siul_GPIO[130] / etimer2_ETC[2] / dspi0_CS6 / flexpwm1_FAULT[2] F17 G[4] / siul_GPIO[100] / flexpwm0_B[2] / etimer0_ETC[5] G1 H[3] / siul_GPIO[115] / npc_wrapper_MDO[ DD_HV_IO_RING 32 Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 33

... H11 V SS_LV H12 V DD_LV 3 H13 NP H14 V SS_LV H15 V DD_HV_REG_1 H16 V DD_HV_FLA0 H17 H[6] / siul_GPIO[118] / flexpwm1_B[0] / dspi0_CS5 J1 F[7] / siul_GPIO[87] / npc_wrapper_MCKO J2 G[15] / siul_GPIO[111] / npc_wrapper_MDO[ DD_HV_REG_0 Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 33 ...

Page 34

... NP 1 K14 NC K15 H[8] / siul_GPIO[120] / flexpwm1_A[1] / dspi0_CS6 K16 H[7] / siul_GPIO[119] / flexpwm1_X[1] / etimer2_ETC[1] K17 A[3] / siul_GPIO[3] / etimer0_ETC[3] / dspi2_CS0 / flexpwm0_B[3] / mc_rgm_ABS[2] / siul_EIRQ[3] L1 F[10] / siul_GPIO[90] / npc_wrapper_EVTO_B L2 F[11] / siul_GPIO[91] / leo_sor_proxy_EVTI_B L3 D[9] / siul_GPIO[57] / flexpwm0_X[0] / lin1_TXD Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 35

... C[11] / siul_GPIO[43] / etimer0_ETC[4] / dspi2_CS2 M15 B[5] / siul_GPIO[21] / jtagc_TDI M16 TMS M17 H[5] / siul_GPIO[117] / flexpwm1_A[0] / dspi0_CS4 N1 XTAL N2 V SS_HV_IO_RING N3 D[5] / siul_GPIO[53] / dspi0_CS3 / flexpwm0_FAULT[ SS_LV_PLL0_PLL1 Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 35 ...

Page 36

... P14 V DD_HV_IO_RING P15 G[10] / siul_GPIO[106] / flexray_DBG2 / dspi2_CS3 / flexpwm0_FAULT[2] P16 G[8] / siul_GPIO[104] / flexray_DBG0 / dspi0_CS1 / flexpwm0_FAULT[0] / siul_EIRQ[21] P17 G[7] / siul_GPIO[103] / flexpwm0_B[3] R1 EXTAL R2 FCCU_F[ SS_HV_IO_RING R4 D[7] / siul_GPIO[55] / dspi1_CS3 / dspi0_CS4 R5 B[7] / siul_GPIO[23] / lin0_RXD R6 E[6] / siul_GPIO[70] 36 Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 37

... A[0] / siul_GPIO[0] / etimer0_ETC[0] / dspi2_SCK / siul_EIRQ[0] T15 D[10] / siul_GPIO[58] / flexpwm0_A[0] / etimer0_ETC[0] T16 V DD_HV_IO_RING T17 V SS_HV_IO_RING U1 V SS_HV_IO_RING U2 V SS_HV_IO_RING E[4] / siul_GPIO[68] U5 C[2] / siul_GPIO[34] U6 E[2] / siul_GPIO[66] U7 B[9] / siul_GPIO[25] Freescale Semiconductor Preliminary—Subject to Change Without Notice Concatenated Pin Names MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions 37 ...

Page 38

... V Input/Output supply voltage DD_HV_IO 38 Preliminary—Subject to Change Without Notice Concatenated Pin Names ) for normal operations. SS Table 5. Supply pins Supply Description VREG control and power supply pins Power Supply pins (3.3 V) MPC5643L Microcontroller Data Sheet, Rev. 3 Package 257 144 MAPBGA LQFP 69 R13 1 70 VDD_LV 2 ...

Page 39

... Preliminary—Subject to Change Without Notice Table 5. Supply pins (continued) Supply Description Power Supply pins (1.2 V) pin. DD_LV_COR pin. SS_LV_COR DD_LV_PLL. SS_LV_PLL. pin. SS_LV_COR pin. DD_LV_COR MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions Package 257 144 MAPBGA LQFP 4 7 VSS_HV VDD_HV ...

Page 40

... Table 5. Supply pins (continued) Supply Description SS_LV_REGCOR. DD_LV_REGCOR. pin. SS_LV_COR DD_LV_COR pin. pin. DD_LV_COR pin. DD_LV_COR pin. DD_LV_COR pin. DD_LV_COR ) for normal operations. SS MPC5643L Microcontroller Data Sheet, Rev. 3 Package 257 144 MAPBGA LQFP 1 70 VDD_LV 2 71 VSS_LV 1 93 VDD_LV 2 94 VSS_LV ...

Page 41

... Pins labeled “Reserved” are to be tied to ground. Not doing so may cause unpredictable device behavior. Freescale Semiconductor Preliminary—Subject to Change Without Notice Table 6. System pins Description Dedicated pins Reset pin NOTE MPC5643L Microcontroller Data Sheet, Rev. 3 Package pinouts and signal descriptions Table 6 are single-function pins. The Package Direction 144- 257- pin ...

Page 42

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing ...

Page 43

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 44

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 45

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 46

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 47

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 48

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 49

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 50

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 51

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 52

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 53

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 54

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 55

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 56

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 57

... Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MPC5643L products in 257 MAPBGA packages Table 7. Pin muxing (continued) ...

Page 58

... ADC1 ground and low reference voltage SS_HV_ADR1 V SR 3.3 V ADC supply voltage DD_HV_ADV V SR 3.3 V ADC supply ground SS_HV_ADV 58 Preliminary—Subject to Change Without Notice Table 8. Absolute maximum ratings Parameter Conditions MPC5643L Microcontroller Data Sheet, Rev Min Max Unit 3, 4 — –0.3 4.0 V — –0.1 0 — ...

Page 59

... SR Internal supply voltage DD_LV_REGCOR Freescale Semiconductor Preliminary—Subject to Change Without Notice 1 Parameter Conditions during DD ) Relative to V cannot be operated be operated at different voltages, and need to be supplied by Parameter MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics (continued) 2 Min Max Unit 6 3.0 × 10 — 0.5 V/µs (3.0 V/sec) — ...

Page 60

... SS_LV_xxx ) must be connected to the external ballast emitter, if one DD_LV_xxx Parameter Single layer board – Four layer board – 2s2p MPC5643L Microcontroller Data Sheet, Rev Conditions Min Max Unit — — — — ...

Page 61

... C/W) Equation 2 as the sum of a junction to case thermal resistance θJA θJC θCA MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 1 Conditions Value Unit TBD °C/W TBD °C/W — TBD °C/W — TBD °C/W — TBD °C/W 1: Eqn. 1 Eqn. 2 ...

Page 62

... B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal Resistance and Its Application in Thermal Modeling,” Proceedings of SemiTherm, San Diego, 1999, pp. 212–220. 62 Preliminary—Subject to Change Without Notice Equation (Ψ × MPC5643L Microcontroller Data Sheet, Rev. 3 Eqn. 3 Freescale Semiconductor ...

Page 63

... Device settings chosen for worst-case emissions from typical 2 use configuration No PLL frequency modulation ± 2% PLL frequency modulation — MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 1 Min Typ Max Unit 0.15 — 1000 MHz — — 120 MHz — ...

Page 64

... HPREG1 uses an internal ballast to support the core current. HPREG2 is used only when external NPN transistor is present on board to supply core current. The MPC5643L always powers up using HPREG1 if an external NPN transistor is present. Then the MPC5643L makes a transition from HPREG1 to HPREG2. This transition is dynamic. Once HPREG2 is fully operational, the controller part of HPREG1 is switched off ...

Page 65

... Before a destructive reset initialization phase completion After a destructive reset initialization phase completion Before a destructive reset initialization phase completion — — — MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Min Typ Max Units 12 — 40 µF Ω 0.03 — ...

Page 66

... MPC5643L NOTE Ω . The minimum value of the ESR is constrained by the DD_HV_IOx Table 16. DC electrical characteristics Conditions — — — 0.65 V — — MPC5643L Microcontroller Data Sheet, Rev ESR C v1v2 C ext V1V2 pin < 3.6 V). 1 Min Max Unit 2 –0.1 — V — ...

Page 67

... V — 0 Conditions T = –40 ° 125 ° MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 1 (continued) Min Max Unit – 0.8 — V — 0.5 V – 0.8 — V — 0.5 V – 0.8 — V — 0.5 V – 0.8 — ...

Page 68

... XOSCHS V XOSCHSOP 68 Preliminary—Subject to Change Without Notice Figure 5 describes a simple model of the internal oscillator driver and EXTAL DEVICE XTAL DEVICE NOTE 90% 10% T valid internal clock XOSCHSSU MPC5643L Microcontroller Data Sheet, Rev. 3 EXTAL XTAL C L EXTAL XTAL 1/f XOSCHS Freescale Semiconductor ...

Page 69

... Oscillator bypass mode Conditions 1 Crystal reference — — Measured using clock division (typically ÷16) 2 — — Lower limit Upper limit 4,5 — Stable oscillator (f PLLIN stable V DD MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Value Unit Min Typ Max 4.0 — 40.0 MHz 4.5 — 11 1.3 — — mA/V V 1.1 — ...

Page 70

... Center spread Down Spread 13 — represents f after PLL output divider (ERFD through 16 in SCM SYS and V and variation in crystal oscillator frequency DDPLL SSPLL MPC5643L Microcontroller Data Sheet, Rev. 3 Min Typ Max Unit μs — — 200 40 — TBD — ...

Page 71

... PTF = Post Trimming Frequency: The frequency of the output clock after trimming at typical supply voltage and temperature. Freescale Semiconductor Preliminary—Subject to Change Without Notice Conditions °C J — °C J MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Min Typ Max Unit — 16 — MHz — — ...

Page 72

... Differential non-linearity error (DNL) (4) Integral non-linearity error (INL) (4) (5) Center of a step of the actual transfer curve ( 1017 1018 1019 1020 1021 1022 1023 V (LSB ) in(A) ideal MPC5643L Microcontroller Data Sheet, Rev. 3 Gain Error GE 1 LSB ideal = V / 1024 DD_ADC Freescale Semiconductor ...

Page 73

... Filter Current Limiter and Figure 22. Input Equivalent Circuit (refer to the equivalent circuit reported in A MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics being the external INTERNAL CIRCUIT SCHEME DD Channel Sampling Selection R ...

Page 74

... (that is typically bigger than the on-chip capacitance) through the resistance F and C were in parallel τ < • MPC5643L Microcontroller Data Sheet, Rev << the sampling capacitance C occurs (C P2 ...

Page 75

... ----------- - = ------------------------------------------------------- - MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics T S definitively bigger than already charged filter, is not able the time constant conversion Rate) ...

Page 76

... REF Current injection on one ADC input, different from the converted one. Remains within TUE spec. , but only the time for determining the digital result and the ADC_S MPC5643L Microcontroller Data Sheet, Rev. 3 Eqn Min Typ Max Unit — 3 — 60 MHz — ...

Page 77

... These values are verified at production test. J Table 27. Flash module life Parameter 1 . from –40 °C to 150 ° Product qualification is performed to the minimum specification. For MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Factory Initial Lifetime 1 Min Typ Unit Avg ...

Page 78

... TBD — internal signal to Pchannel/Nchannel switch-on condition. MPC5643L Microcontroller Data Sheet, Rev Current slew Load drive (mA/ns) (pF) Max Min Typ Max — 4 0.01 — — 2 0.01 — — ...

Page 79

... Pad Data Input Pad Output 3.17 AC timing characteristics 3.17.1 RESET pin characteristics The MPC5643L implements a dedicated bidirectional RESET pin DDMIN nRSTIN device reset forced by nRSTIN Freescale Semiconductor Preliminary—Subject to Change Without Notice Rising Falling Edge Edge Output Output Delay Delay Figure 16 ...

Page 80

... Figure 30. Noise filtering on reset signal 1 Conditions 25pF 50pF 100pF L — — < 5 pF). PKG Parameter /2) DDE MPC5643L Microcontroller Data Sheet, Rev. 3 hw_rst ‘1’ ‘0’ device under hardware reset Min Typ Max Unit — — 12 — — — — 40 — ...

Page 81

... Freescale Semiconductor Preliminary—Subject to Change Without Notice Parameter Figure 17. JTAG test clock input timing Figure 18. JTAG test access port timing MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Conditions Min Max Unit — — — — — ...

Page 82

... NTMSH TCK Low to TDO Data Valid JOV 82 Preliminary—Subject to Change Without Notice 13 14 Figure 19. JTAG boundary scan timing Table 33. Nexus debug port timing Parameter 2 3 MPC5643L Microcontroller Data Sheet, Rev Conditions Min Max Unit — 15.6 — ns — — ...

Page 83

... The system clock frequency needs to be three times faster than the TCK frequency. MCKO MDO MSEO EVTO EVTI Freescale Semiconductor Preliminary—Subject to Change Without Notice Output Data Valid 4 Figure 20. Nexus output timing MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 5 83 ...

Page 84

... Applies when IRQ pins are configured for rising edge or falling edge events, but not both. 84 Preliminary—Subject to Change Without Notice 9 10 Figure 21. Nexus TDI, TMS, TDO timing Table 34. External interrupt timing Parameter 1 MPC5643L Microcontroller Data Sheet, Rev Conditions Min Max Unit — 3 — t CYC — ...

Page 85

... Table 35. FlexCAN timing Parameter Table 36. DSPI timing Conditions Master (MTFE = 0) Slave (MTFE = 0) Slave Receive Only Mode — — — SS active to SOUT valid SS inactive to SOUT High-Z or invalid MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Conditions Min Max Unit — — 26.0 ns — — ...

Page 86

... Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0) Master (MTFE = 1, CPHA = 1) Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0) Master (MTFE = 1, CPHA = 1) Master (MTFE = 0) Slave Master (MTFE = 1, CPHA = 0) Master (MTFE = 1, CPHA = 1) — MPC5643L Microcontroller Data Sheet, Rev. 3 Min Max Unit 13 — — — 2 — ...

Page 87

... Figure 24. DSPI classic SPI timing — master, CPHA = 1 Freescale Semiconductor Preliminary—Subject to Change Without Notice Last Data First Data Data 12 11 First Data Data Last Data 9 Data First Data 12 Data First Data MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 3 10 Last Data 11 Last Data 87 ...

Page 88

... Figure 26. DSPI classic SPI timing — slave, CPHA = 1 88 Preliminary—Subject to Change Without Notice First Data Data Last Data 9 10 First Data Data Last Data 11 5 Data First Data 9 10 Data First Data MPC5643L Microcontroller Data Sheet, Rev Last Data Last Data Freescale Semiconductor ...

Page 89

... Figure 28. DSPI modified transfer format timing — master, CPHA = 1 Freescale Semiconductor Preliminary—Subject to Change Without Notice First Data Last Data Data 12 11 Last Data First Data Data 9 First Data Data 12 First Data Data MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics Last Data 11 Last Data 89 ...

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... Preliminary—Subject to Change Without Notice First Data Data Last Data 10 9 Data First Data Last Data 11 5 First Data Data 9 10 First Data Data MPC5643L Microcontroller Data Sheet, Rev Last Data Last Data Freescale Semiconductor ...

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... PCSS PCSx Figure 31. DSPI PCS strobe (PCSS) timing Freescale Semiconductor Preliminary—Subject to Change Without Notice 7 MPC5643L Microcontroller Data Sheet, Rev. 3 Electrical characteristics 8 91 ...

Page 92

... Package characteristics 4 Package characteristics 4.1 Package mechanical data Figure 32. 144 LQFP package mechanical drawing ( Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 93

... Figure 33. 144 LQFP package mechanical drawing ( Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Package characteristics 93 ...

Page 94

... Package characteristics Figure 34. 257 MAPBGA package mechanical drawing ( Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

Page 95

... Figure 35. 257 MAPBGA package mechanical drawing ( Freescale Semiconductor Preliminary—Subject to Change Without Notice MPC5643L Microcontroller Data Sheet, Rev. 3 Package characteristics 95 ...

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... MB/128 KB 257 MAPBGA (Pb free) 1 MB/128 KB 144 LQFP (Pb free) 1 MB/128 KB 257 MAPBGA (Pb free) 1 MB/128 KB 144 LQFP (Pb free) 1 MB/128 KB 257 MAPBGA (Pb free) MPC5643L Microcontroller Data Sheet, Rev Tape and reel status R = Tape and reel (blank) = Trays Qualification status P = Pre-qualification M = Fully spec. qualified, general market flow S = Fully spec ...

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... MAPBGA (Pb free) Table 38. Revision history Description of Changes Table 1, MPC5643L device summary. Table 8, updated maximum ratings. Table 10 and Table 11, removed moving-air thermal characteristics. MPC5643L Microcontroller Data Sheet, Rev. 3 Document revision history Speed Other features (MHz) No FlexRay 80 –40–125 °C No FlexRay 80 –40–125 °C ...

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... Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. All rights reserved. MPC5643L Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor ...

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