km68257e Samsung Semiconductor, Inc., km68257e Datasheet - Page 2

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km68257e

Manufacturer Part Number
km68257e
Description
32kx8 Bit High-speed Cmos Static Ram 5v Operating Operated At Commercial And Industrial Temperature Ranges.
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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ORDERING INFORMATION
KM68257E, KM68257EI
• Fast Access Time 10, 12, 15ns(Max.)
• Low Power Dissipation
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
• Three State Outputs
• Standard Pin Configuration
32K x 8 Bit High-Speed CMOS Static RAM
FEATURES
A
A
A
A
A
A
A
A
A
WE
KM68257E -10/12/15
KM68257EI -10/12/15
0
1
2
3
4
5
6
7
8
OE
CS
- No Clock or Refresh required
Standby (TTL)
Operating
I/O
FUNCTIONAL BLOCK DIAGRAM
1
~I/O
8
(CMOS) : 2mA(Max.)
KM68257ETG : 28-TSOP1-0813. 4F
KM68257EJ
Clk Gen.
KM68257E - 10 : 80mA(Max.)
KM68257E - 12 : 80mA(Max.)
KM68257E - 15 : 80mA(Max.)
: 20mA(Max.)
Cont.
Data
Gen.
CLK
: 28-SOJ-300
A
9
Commercial Temp.
Industrial Temp.
Pre-Charge-Circuit
A
10
Column Select
Memory Array
64x8 Columns
I/O Circuit
512 Rows
A
11
A
12
A
13
A
14
- 2 -
The KM68257E is a 262,144-bit high-speed Static Random
Access Memory organized as 32,768 words by 8 bits. The
KM68257E uses 8 common input and output lines and has an
output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNG s
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The KM68257E is packaged in
a 300mil 28-pin plastic SOJ or TSOP1 forward.
PIN FUNCTION
GENERAL DESCRIPTION
Vcc
WE
OE
A
A
A
A
A
A
A
A
A
A
A
11
13
14
12
I/O
9
8
7
6
5
4
3
Pin Name
A
0
1
WE
V
V
PIN CONFIGURATION
CS
OE
- A
~ I/O
CC
SS
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I/O
I/O
I/O
Vss
A
A
8
A
A
A
A
A
A
A
A
14
12
7
6
5
4
3
2
1
0
1
2
3
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
TSOP1
SOJ
PRELIMINARY
Pin Function
CMOS SRAM
(Top View)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A
A
A
A
OE
A
CS
I/O
I/O
I/O
I/O
I/O
13
8
9
11
10
August 1998
Revision 0.0
8
7
6
5
4
A
CS
I/O
I/O
I/O
I/O
I/O
Vss
I/O
I/O
I/O
A
A
A
10
0
1
2
8
7
6
5
4
3
2
1

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