mc33285dr2 Freescale Semiconductor, Inc, mc33285dr2 Datasheet - Page 8

• Manufacturer Part Number: mc33285dr2
• Description: Dual High-side Tmos Driver
• Manufacturer: Freescale Semiconductor, Inc

INTRODUCTION
outputs.The outputs, OUT1 and OUT2, are switched ON and
OFF by the input (IN) .There are three ways to control the
outputs:
OUT2 is limited.
PUMP (CP) pin is used to store the charge continuously
delivered by the charge pump. The voltage on this pin is
limited to a maximum value V
sourced with a constant current from C
Additionally, the gates of the power FETs are precharged
from voltage power supply (V
discharged by a voltage on OUT1 or OUT2, is still lower than
V
V
exceeded gate-source voltage by an internal zener diode.
undercurrent and short-circuit conditions. The drain-source
voltage of the FET on OUT1 is checked if Channel One is
switched ON. The internal error voltage threshold determines
the maximum drain-source voltage allowing the power FET to
stay in the ON state. If the measured drain-source voltage
exceeds the internal error voltage threshold, the output of the
short-circuit protection comparator (SCPC) is enabled. If the
output of the SCPC is active longer than t
OUT1 is switched OFF.
circuit condition, the power FET can only be turned ON again
by the input IN.
are discharged by a constant current, I
8
33285
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
VCC
OUT1MAX
The 33285 contains only one charge pump for two
OUT1 can be switched alone
OUT1 and OUT2 can be switched together
OUT2 can be switched when OUT1 is already on
In the last case, the voltage drop on OUT1 when charging
The external capacitor (C
The power FET on OUT1 is protected against an
Channel One protects the N-Channel power FET on OUT1
After switching OFF the power FET on OUT1 by an short-
When switching OFF the power FETs their gate capacities
. The values of the output voltages are limited to
and V
OUT2MAX
.
CP
CC
CPMAX
) connected to the CHARGE
) to prevent C
. Both outputs are
CP
FUNCTIONAL DEVICE OPERATION
OUTOFF
to switch them ON.
OCDET
CP
.
, output
from being
OPERATIONAL MODES
and OUT2, are in the OFF state.
period longer than t
t
below V
INTERNAL ZENER DIODE
SOURCE (SRC). Design guarantees V
clamping voltage between OUT1 and SRC is V
20 V
PWM CAPABILITY
ON C
on the next PWM cycle to a value sufficient to guarantee the
specified turn ON behavior.
load conditions:
• PWM cycle is period T = 20 ms ; OUT2 is switched ON
• Test condition V
CROSS TALK BETWEEN OUT1 AND OUT2
the voltage drop occurring on OUT1 is limited.
• 10 V < V
• 7.0 V < V
sourced out of the SRC pin for the time t
there is an external leakage current on that node in the
application. The high-side switch on OUT1 is turned ON only
if the test is successful.
OUT2ACT
If the input IN is disconnected, the 33285 outputs, OUT1
If overvoltage occurs on the DRAIN (DRN) pin for a time
An on-chip zener diode is placed between OUT1 and The
The C
The PWM capability is measured with a test circuit and
from 10 to 90 percent of T
cycle defined above
If output OUT2 is switched ON while OUT1 is already ON,
Voltage drop on OUT1:
Each time OUT1 is switched ON, a current I
CP
IH
when switching ON OUT2 is refreshed until the Start
PIC2
. In an overvoltage condition OUT1 is OFF if IN is
.
VCC
VCC
is PWM capable on OUT2. The loss of charge
< 20 V : OUT1 not below V
< 20 V : OUT1 not below V
IN
LDDET
ramps 2.5 V ≤ 5.0 V according to PWM
Analog Integrated Circuit Device Data
, OUT2 is switched ON for the time
Freescale Semiconductor
Z
LCDET
> V
VCC
VCC
TH1
LCDET
to check if
TH1
+ 7.0 V
. Zener
+ 7.0 V
< V
is
Z
<