mc33102p ON Semiconductor, mc33102p Datasheet - Page 13

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mc33102p

Manufacturer Part Number
mc33102p
Description
Dual Sleep-mode Operational Amplifier
Manufacturer
ON Semiconductor
Datasheet

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values of R
slower sleepmode state before switching to the awakemode.
awake mode is:
Where:
voltage and temperature. In general, any current loading on
the output which causes a current greater than I
will switch the amplifier into the awakemode. This includes
transition currents such as those generated by charging load
capacitances. In fact, the maximum capacitance that can be
driven while attempting to remain in the sleepmode is
approximately 1000 pF.
may also cause the device to transition to the awakemode. To
sleepmode, the power supply currents (I
measured. When the magnitude of either power supply
current exceeds 400 μA, the device is in the awakemode.
When the magnitudes of both supply currents are less than
400 μA, the device is in the sleepmode. Since the total
supply current is typically ten times higher in the
awakemode than the sleepmode, the two states are easily
distinguishable.
(for a dual op amp) plus the output source current of device
A and the output source current of device B. Similarly, the
measured value of I
The transition time (t
t
I
R
SR
Although typically 160 μA, I
Any electrical noise seen at the output of the MC33102
To determine if the MC33102 is in the awakemode or the
The measured value of I
D
TH
L
= Amplifier delay (t1.0 μs)
sleepmode
= Load resistance
= Output threshold current for more transition
(160 μA)
L
, requiring the amplifier to slew longer in the
C
t
= Sleepmode slew rate (0.16 V/μs)
L(max)
tr1
+ t
D
− is equal to the I
D
= I
= 160 μA/(0.16 V/μs)
= 1000 pF
+ I
tr1
TH
) required to switch from sleep to
TH
D
/SR
+ equals the I
(R
L
sleepmode
SR
TH
sleepmode
D
− of both devices plus
varies with supply
D
+ and I
D
)
of both devices
TESTING INFORMATION
D
TH
−) must be
to flow
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13
minimize this problem, a resistor may be added in series
with the output of the device (inserted as close to the device
as possible) to isolate the op amp from both parasitic and
load capacitance.
controlled by an internal delay circuit, which is necessary to
prevent the amplifier from going to sleep during every zero
crossing. This time is a function of supply voltage and
temperature as shown in Figure 22.
important system design consideration when using a
sleepmode amplifier. The amplifier has been designed to
obtain the maximum GBW in both modes. “Smooth” AC
transitions between modes with no noticeable change in the
amplitude of the output voltage waveform will occur as long
as the closed loop gains (A
substantially equal at the frequency of operation. For
smooth AC transitions:
Where:
the output sink current of each device. I
currents caused by both the feedback loop and load
resistance. The total I
measured I
on automatic test equipment is to remove the I
both Channel A and B. Then measure the I
the device goes back to the sleepmode state. The transition
will take typically 1.5 seconds with ±15 V power supplies.
was accomplished with a 1.0 MΩ load resistor which
ensured the device would remain in sleepmode despite large
voltage swings.
The awakemode to sleepmode transition time is
Gain bandwidth product (GBW) in both modes is an
A
BW = The required system bandwidth or operating
An accurate way to measure the awakemode I
The large signal sleepmode testing in the characterization
CLsleepmode
frequency
D
(A
to obtain the correct I
CLsleepmode
= Closed loop gain in the sleepmode
out
) (BW) < GBW
needs to be subtracted from the
CL
D
) in both modes are
of the dual op amp.
out
sleepmode
is the sum of the
D
values before
out
out
current on
current

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