mc33351adtb ON Semiconductor, mc33351adtb Datasheet - Page 12

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mc33351adtb

Manufacturer Part Number
mc33351adtb
Description
Lithium Battery Protection Circuit For Three Battery Packs
Manufacturer
ON Semiconductor
Datasheet
Discharge Current Sensing
added to the battery pack with the addition of a sense resistor
R
drop across the series FETs on the High−Side.
Sense resistor − low−side
negative terminal of Cell 1 and the negative terminal of the
battery pack, Refer to Figure 1.
voltage drop across R
Pin 5 is greater than Pin 13 by 50 mV for more than 3.0 ms.
The fault information is stored in a data latch and discharge
MOSFET Q2 is turned off, disconnecting the battery pack
from the load. As a result of the discharge current fault, the
battery pack is available for charging only. The discharge
current limit is given by:
Voltage across FETs − high−side
is used to program the high−side discharge current limit
threshold.
the load from the battery pack, or by connecting the battery
pack to the charger. When the voltage on Pin 16 no longer
exceeds Pin 8 by approximately 2.0 V, the Sense Enable
remaining cells can then be connected in any order. This assembly method prevents forward biasing the protection IC
substrate which can result in overheating and non−functionality.
lim(dschg)
Discharge current limit protection can be selectively
The sense resistor R
As the battery pack discharges, Pins 5 and 13 sense the
A discharge current limit fault is detected if the voltage at
A 1MΩ or 2MΩ resistor connected from pin# 11 to ground
The discharge current fault is reset by either disconnecting
Upon assembly of the battery pack, it is imperative that Cell 1 be connected first so that V
I
Lim(dschg)
on the Low−Side or by monitoring the voltage
+
Lim(dschg)
R
lim(dschg)
V
Lim(dschg)
th(dschg)
.
is placed in series with the
+
R
Lim(dschg)
50 mV
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circuit will turn on discharge MOSFET Q2. Discharge
current sensing can be disabled by connecting Pin 16 to
Pin 8.
in response delay of 3.0 ms. This helps to prevent fault
activation when the battery pack is subjected to pulsed
currents during charging or discharging.
Battery Pack Application
C
and two resistors labeled R
charge and discharge gate drive outputs. These components
prevent excessive currents from flowing into the
MC33351A when the battery pack terminals are shorted or
arced and are mandatory. Capacitor C
ceramic leaded or surface mount type. It must be placed
directly across the battery pack plus and minus terminals
with extremely short lead lengths (≤1/16”) and as close to
the IC as possible. The gate drive output resistors for both Q1
and Q2 are 10 kΩ ±5.o% carbon film type.
MOSFETs are used, the protection circuit may take several
seconds to reset from an overcurrent fault after the load is
removed. If desired, this situation can be remedied by
providing a small leakage path for charging C
Pin 8 to rapidly rise, so that it no longer exceeds Pin 16 by
approximately 2.0 V. A 4.7 MΩ resistor placed across the
MOSFET switches accomplishes this task with a minimum
increase in cell discharge current when the battery pack is
connected to the load.
I
The discharge current protection circuit contains a built
Each of the application figures show a capacitor labeled
In applications where inordinately low leakage
that connects directly across the battery pack terminals,
g
that are placed in series with the
C
is properly biased. The
I
is a 1.0 μF ±20%
I,
thus allowing

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