mc33911 Freescale Semiconductor, Inc, mc33911 Datasheet - Page 27

• Manufacturer Part Number: mc33911
• Description: Mc33911 Lin System Basis Chip With Dc Motor Pre-driver
• Manufacturer: Freescale Semiconductor, Inc

RST Wake-up
RST pin is held low long enough to pass the internal glitch
filter. Then, it will change to Normal Request or Normal
Modes depending on the WDCONF pin configuration. The
RST wake-up does not generate an interrupt and is not
reported via the SPI.
configured:
configured:
WINDOW WATCHDOG
which is active in Normal Mode. The watchdog can be
configured by an external resistor connected to the WDCONF
pin. The resistor is used to achieve higher precision in the
timebase used for the watchdog.
MOD bits of the Mode Control Register (MCR).
not allowed, but after the first half of the SPI timeout window,
the clear operation opens. If a clear operation is performed
outside the window, the 33911 will reset the MCU, in the
same way as when the watchdog overflows.
Analog Integrated Circuit Device Data
Freescale Semiconductor
While in Stop Mode, the 33911 can wake-up when the
From Stop Mode, the following wake-up events can be
• Wake-up from Lx inputs without cyclic sense
• Cyclic sense wake-up inputs
• Force wake-up
• CS wake-up
• LIN wake-up
• RST wake-up
From Sleep Mode, the following wake-up events can be
• Wake-up from Lx inputs without cyclic sense
• Cyclic sense wake-up inputs
• Force wake-up
• LIN wake-up
The 33911 includes a configurable window watchdog
SPI clears are performed by writing through the SPI in the
During the first half of the SPI timeout, watchdog clears are
WD TIMING X 50%
NO WATCHDOG CLEAR
Figure 16. Window Watchdog Operation
WINDOW CLOSED
WD TIMING SELECTED BY REGISTER
ALLOWED
ON WDCONF PIN
WD PERIOD (t
PWD
WD TIMING X 50%
FOR WATCHDOG
WINDOW OPEN
)
CLEAR
user must connect the WDCONF pin to ground. This
measure effectively disables Normal Request Mode. The
WDOFF bit in the Watchdog Status Register (WDSR) will be
set. This condition is only detected during Reset Mode.
the watchdog falls back to the internal lower precision
timebase of 150ms (typ.) and signals the faulty condition
through the WDSR.
prescaler which can be configured by the Timing Control
Register (TIMCR). During Normal Request Mode, the
window watchdog is not active but there is a 150ms (typ.)
timeout for leaving the Normal Request Mode. In case of a
timeout, the 33911 will enter into Reset Mode, resetting the
microcontroller before entering again into Normal Request
Mode.
HIGH SIDE OUTPUT PIN HS1
resistive loads or LEDs incorporating the following features:
Side Control Register (HSCR).
PWM Capability (direct access)
direct control via the PWMIN pin.
HS1 driver is turned on if the PWMIN pin is high, and turned
off if the PWMIN pin is low.
To disable the watchdog function in Normal Mode, the
If neither a resistor nor a connection to ground is detected,
The watchdog timebase can be further divided by a
This output is one high side driver intended to drive small
• PWM capability (software maskable)
• Open-load detection
• Current limitation
• Over-temperature shutdown (with maskable interrupt)
• High-voltage shutdown (software maskable)
• Cyclic sense
The high side switch is controlled by the HS1 bit in the High
The high side driver offers additional (to the SPI control)
If the HS1 bit and PWMHS1 is set in the HSCR, then the
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
33911
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