mc33560 ON Semiconductor, mc33560 Datasheet - Page 17
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mc33560
Manufacturer Part Number
mc33560
Description
Power Management And Interface Ic For Smartcard Readers And Couplers
Manufacturer
ON Semiconductor
Datasheet
1.MC33560.pdf
(26 pages)
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BIDIRECTIONAL LEVEL TRANSLATOR
C8/CRDC8, Figure 24) adapts the signal voltage levels of
the I/O and control lines between the micro controller
(supplied by V
CRDV
completed, this module is transparent for the data, and acts
as if the card was directly connected to the reader
microcontroller. The core of the level shifter circuit defined
for the bidirectional CRDIO, CRDC4 and CRDC8 lines
consists of a NMOS switch which can be driven to the logic
low state from either side (microcontroller or card). If both
sides work in transmission mode with opposite phase, then
signal collision on the line is not avoidable. In this case, the
peak current is limited to a safe value for the integrated
circuit and the smartcard.
impedance (T1 = 250 W maximum) is low enough to charge
parasitic capacitance, and have a high enough dv/dt. On low
to high transition, the NMOS transistor is not active above
a certain voltage, and an acceleration circuit is activated to
ensure a high dv/dt.
supply CRDV
their last logic state.
CRDC4 and CRDC8 lines to a low state, thus preventing
any unwanted voltage level to be applied to the data lines
when the card is not in use.
SECURITY FEATURES
to guarantee that no electrical damage will be caused to the
smartcard:
•
•
•
Figure 24. Bidirectional Translator Functional Block
This module (used on I/O/CRDIO, C4/CRDC4,
When CS is low, with CRDV
During high−to−low transitions, the NMOS transistor
When the chip is disabled
When the converter is off, a transistor forces the CRDIO,
The MC33560 has a number of unique security functions
Battery supply minimum voltage threshold
Card supply undervoltage and overcurrent detection
with automatic shutdown
Card pin overvoltage clamp to CRDV
(C4)
(C8)
IO
CC
VBAT
)
CARDENABLE
CC
BAT
still active, the I/O, C4 and C8 lines keep
) and the smartcard (supplied by
CONTROL
LOGIC
SEQ1 (SEQ3)
T1
(
CC
CS
on, and start sequencing
=
H) with the voltage
CRDVCC
CRDGND
CC
T2
18 K
(CRDC4)
(CRDC8)
CRDIO
http://onsemi.com
MC33560
17
•
•
•
•
detector are limiting power dissipation.
ESD PROTECTION
must absorb high Electro Static Discharge (ESD) energy
during card insertion. In addition, the control circuits
attached to these pins must safely withstand short circuits
and voltage transients during forced card extraction.
protection, current limitation and short circuit protection on
all smartcard interface pins, including C4 and C8.
PARALLEL OPERATION
the digital control and data bus lines are common to all
MC33560. Only the chip select signal, CS, requires a
separate line for each interface.
CRDCLK will keep their logical state on the card side, and
will go to high impedance mode on the microprocessor side.
This arrangement was chosen only to illustrate the parallel
operation of two card interfaces in the same module. The
discrete capacitor components are necessary to provide low
impedance on the supply lines V
suppress the high frequency noise due to the DC−DC
converter. The load resistors are external in order to adapt
the sense current of the “card present” switches.
MINIMUM POWER CONSUMPTION
CONSIDERATIONS
card presence detector are disabled in standby mode
(CS = H: DC−DC converter stopped).
all pins with pullup resistance
to be kept in the high state or left open, and pins with
pulldown resistance
to be kept in the low state or left open. ASYCLKIN should
not be connected to an active clock signal during standby to
avoid dynamic currents. This is valid also for SYNCLK,
except that it can be left open.
A current limiting function and an overtemperature
Due to the nature of smartcards, the card interface pins
Therefore, the MC33560 features enhanced ESD
For applications where two or more MC33560 are used,
While deselected, all communication pins except
Figure 31 shows a typical application of a dual card reader.
All analog blocks except the V
In order to maintain standby current at a minimum value,
Card presence detector for “clean” and fast shutdown
Consistent card signal sequencing at startup and
powerdown, according to ISO7816, even on error
conditions
Consistent clock signal, even when division ratio or
synchronization clock signal are changed “on the fly”
during a card session (Figure 29)
Active pulldown on all card pins, including CRDV
when not in normal operating mode.
(
RESET, SYNCLK, PWRON) have
(
CS, INT, RDYMOD) have
BAT
BAT
and CRDV
comparator and the
CC
and to
CC
,