adm6992c Infineon Technologies Corporation, adm6992c Datasheet - Page 32

• Manufacturer Part Number: adm6992c
• Description: Two Port Bridge Fiber To Fast Ethernet Converter
• Manufacturer: Infineon Technologies Corporation

Table 15
Mode
Latch high,
self clearing
Latch low,
self clearing
Latch high,
mask clearing
Latch low,
mask clearing
Interrupt high,
self clearing
Interrupt low,
self clearing
Interrupt high,
mask clearing
Interrupt low,
mask clearing
Interrupt enable
register
latch_on_reset
Read/write
self clearing
Table 16
Clock Short Name
4.2.1
Signature Register
SR
Signature Register
Data Sheet
Register Access Types (cont’d)
Registers Clock Domains
EEPROM Register Format
Symbol Description HW
lhsc
llsc
lhmk
llmk
ihsc
ilsc
ihmk
ilmk
ien
lor
rwsc
Latches high signal at high level, clear
on read
Latches high signal at low-level, clear
on read
Latches high signal at high level,
register cleared with written mask
Latches high signal at low-level,
register cleared on read
Differentiates the input signal (low-
>high) register cleared on read
Differentiates the input signal (high-
>low) register cleared on read
Differentiates the input signal (high-
>low) register cleared with written mask
Differentiates the input signal (low-
>high) register cleared with written
mask
Enables the interrupt source for
interrupt generation
rw register, value is latched after first
clock cycle after reset
Register is used as input for the hw, the
register will be cleared due to a HW
mechanism.
Description
Offset
00
32
H
Description SW
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared
SW can read the register, with write mask
the register can be cleared
SW can read and write this register
Register is readable and writable by SW
Writing to the register generates a strobe
signal for the HW (1 pdi clock cycle)
Register is readable and writable by SW.
Registers Description
Rev. 1.02, 2005-11-25
ADM6992C/CX
Ninja C/CX
Reset Value
4154
H