peb2254 Infineon Technologies Corporation, peb2254 Datasheet - Page 2

• Manufacturer Part Number: peb2254
• Description: Frame Line Interface Component Falc
• Manufacturer: Infineon Technologies Corporation

Frame and Line Interface Component (FALC
Frame Aligner
• Frame alignments/synthesis for 2048 kbit/s (CEPT,
• Meets newest CCITT Rec’s, ETSI Rec’s, FTZ Rec’s, and
• Programmable formats for
• Selectable conditions for loss of sync
• Fully implementation of the CRC4 Non-CRC4
• Interworking of CCITT G.706
• Error checking via CRC4 or CRC6 procedures
• Error monitoring via E-bit and SA6-bit in CEPT mode
• Performance monitoring
• Insertion and extraction of alarms (AIS, RRA, AUXP…)
• IDLE-code insertion for selectable channels
• System clock frequency different for receive and
• Selectable 2048/4096-kbit/s system internal highway with
• Programmable TRISTATE function of 4096 kbit/s output
• Two-frame deep elastic receive memory for receive route
• One frame elastic transmit memory (PCM24 mode only)
• Support for different data link schemes
• Flexible transparent modes
• Channel- and line loop back capabilities
Siemens Aktiengesellschaft
PCM30) and 1544 kbit/s (T1, PCM24)
AT&T Technical References
PCM30: Doubleframe, CRC Multiframe
PCM24: 4-Frame Multiframe (F4),12-Frame Multiframe
(F12, D3/4), Extended Superframe (ESF), Remote Switch
Mode (F72, SLC96)
transmit
programmable receive/transmit shifts
via RDO
clock wander and jitter compensation (can be reduced to
one frame length for PCM30 master-slave
applications)
for transmit route clock wander and jitter compensation
™
54)
2
Signaling Controller
• LAPD controller
• Support DL-channel protocol for ESF format according to
• Handling of bit-oriented functions
• Programmable maximum packet size checking
• Programmable preamble
• Extended address masking
• Programmable FIFO size (32,16, …)
• CAS controller
• Multiframe synchronization and synthesis
• Alarm detection and generation
• Bit robbing support
• Clear channel capabilities in PCM24 mode
• Transparent Mode
MP Interface
• 8/16-bit microprocessor bus interface (Intel or Motorola
• All registers directly accessible (byte or word access)
• Extended interrupt capabilities
General
• Boundary scan standard IEEE 1149.1
• Advanced CMOS technology
• P-MQFP-80 package
• Power consumption less than 400 mW
T1-403-1989 ANSI specification or according to
AT&T specification TR54016 september 1989
type)
Note: The FALC54’s power consumption is mainly
determined by the line length and type of the cable.
PEB 2254