mc92300 Freescale Semiconductor, Inc, mc92300 Datasheet
mc92300
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mc92300 Summary of contents
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... APLL VLCK 2 SR VTSTI[1:0] QVAL Figure 1. Viterbi Decoder Block Diagram Current Information@www.mot.com/ADC MC92300 DTVVIT BITCLK RESET_N VC0,VC1[2:0] VDCLK SYMCLK VTSTI[1:0] SR[2:0] SDA DSA[6:0] SCL Ordering Information Device Package MC92300CG Viterbi VO Core BIT- CLK Interface 7 SCL DSA SDA VO VLCK VFF VEF 128QFP 5/28/97 ...
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... The internal registers of the VITERBI are accessible 2 C interface. After reset, default values are prepro- In order to allow a simple system design, a Analogue are generated for a given [MHz] R [MHz] for rates s o 1/2 2/3 38.3 28.3 37.7 42.4 47.2 49.5 20.5 20.5 27.3 30.7 34.2 35.9 1 4/3 o The MC92300 is used in satellite receiver implementa- The MC92300 is available in a 128-pin Plastic Quad 3/4 5/6 7/8 3/2 5/3 7/4 MC92300 Rev.1.3 ...
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... VEF - FIFO Empty Flag SR[2:0] - Selected Rate VO - Viterbi Decoder Output VC0,VC1[2:0] - Soft Decision Input 2 SDA - Data Bus of I DSA[6:0] - Slave Address of I SCL - Clock Line of I TESTSEL, FREF, TESTOUT, VCOCTL - APLL pins MC92300 Rev.1 ...
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... RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET:http://mot-sps.com/sps/General/sales.html are registered trademarks of Motorola, Inc. Motorola, Inc Equal JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 81-3-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 MC92300 ...