as8221d austriamicrosystems, as8221d Datasheet

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as8221d

Manufacturer Part Number
as8221d
Description
Flexray Standard Transceiver
Manufacturer
austriamicrosystems
Datasheet

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Part Number:
AS8221D
Manufacturer:
AMS
Quantity:
20 000
A S 8 2 2 1 D
F l e x R a y Sta n d a r d Tr a n s c e i v e r
1 General Description
This objective data sheet describes the intended
functionality of the AS8221 bus transceiver. As long the
device is not fully qualified, the parameters are not
characterized in the means that parameters may change
or can be updated during final product qualification and
characterization. This document shows the objective of
the AS8221 and this document is subjected to change
without notice.
The AS8221 is a high speed automotive bus driver
designed according to the FlexRay Electrical Physical
Layer Specification V2.1 Rev B. The AS8221 operates
as a bi-directional interface between the FlexRay
Communication Controller and the twisted-pair copper
wiring.
The AS8221 provides an optimized host controller
interface consisting of three low-active pins. The Enable
and Standby input pins for mode handling by the
microcontroller and the Error out pin where system, chip
failures or status information are signalled to the
microcontroller. Signalling logic high on the Enable and
Standby pin the device will enter Normal mode in case
no fault condition is given and in this mode the device is
fully operational meaning FlexRay communication is
possible. Additionally a Receive Only mode is
implemented, which can be accessed by the
microcontroller where only FlexRay streams can be
received in order to avoid unwanted disturbances on the
FlexRay bus while listening on the bus traffic. In the low
power modes (Standby and Sleep mode) very low
power consumption is achieved.
In case of undervoltage on one of the supply voltages
(V
low power mode (either Standby or Sleep mode) and the
device will signal an error accordingly. In case of low
voltage is detected on both V
enter the Power Off mode, where no operation is
possible. A safe mechanism from the low power modes
to Power Off mode and vice versa is implemented
ensuring that no deadlock can happen during the startup
phase.
Ensuring application in safety critical environments a
two wire bus-guardian interface is implemented where
additional monitoring circuitries on the electronic-
control-unit can activate and deactivate the transmitter
and additionally on the receive enable output in low
power modes the wake conditions and in normal power
modes the received FlexRay streams can be monitored.
www.austriamicrosystems.com
BAT
, V
CC
and V
IO
) the device will change its mode to a
BAT
and V
CC
the device will
Revision 17732-005-10a
A thermal sensor circuit with an integral shutdown
mechanism prevents damage to the device in extreme
temperature conditions. The symmetrical transient
control for the high- and low-side driver for both the bus-
minus and bus-plus line allows an ideal balance of
communications over different network topologies, with
excellent EMC performance.
2 Key Features
3 Applications
The AS8221 FlexRay Standard Transceiver is best
fitting for all automotive applications where the full
functionality of the FlexRay bus driver is needed in the
electronic-control-unit like bus wake-up and control for
voltage supplies.
The device addresses all ECUs connected to the
permanent battery supply (clamp 30). The AS8221 is
connected to the battery voltage and therefore can be
used as the only ECU wake-up component with very low
power consumption in Sleep mode.
Specification V2.1 Rev. B
range insure excellent EMI
current
- Two inhibit pins for external voltage supply control
- Local wake-up input
- Remote wake-up capability via FlexRay bus in low
automatically adapts to interface levels
conditions on the bus (positive and negative battery
voltage)
Compliant with FlexRay Electrical Physical Layer
Data transfer up to 10 Mbps
Excellent EMC performances. High common mode
Interface for Bus Guardian or supervision circuits
Automatic thermal shutdown protection
Supports 12V and 24V systems with very low sleep
Integrated power management system
Supports 2.5, 3, 3.3, 5 V microcontrollers and
Protection against damage due to short circuit
Operating temperature range -40ºC to +125ºC
Lead-free SSOP20 package
power modes
D a t a S h e e t
O bj e c t i v e
1 - 44

Related parts for as8221d

as8221d Summary of contents

Page 1

... FlexRay streams can be monitored. www.austriamicrosystems.com A thermal sensor circuit with an integral shutdown mechanism prevents damage to the device in extreme temperature conditions. The symmetrical transient ...

Page 2

... STBN Host EN Controller Interface ERRN Communication RxD Controller TxD Interface TxEN Bus BGE Guardian RxEN Interface V BAT V BAT INH1 INH2 www.austriamicrosystems.com AS8221 Digital Logic Power Supply Interface V V GND BAT Revision 17732-005-10a Bus Failure Detector BP Transmitter BM Receiver Wake-Up Detector WAKE ...

Page 3

... Error Flags Description..................................................................................................................................23 8.13.1 Undervoltage V detected ...............................................................................................................23 BAT 8.13.2 Undervoltage V detected..................................................................................................................23 IO 8.13.3 Undervoltage V detected.................................................................................................................23 CC 8.13.4 Bus error .............................................................................................................................................23 8.13.5 Low current on BP high side driver .....................................................................................................23 8.13.6 Low current on BP low side driver.......................................................................................................24 8.13.7 Low current on BM high side driver.....................................................................................................24 8.13.8 Low current on BM low side driver ......................................................................................................24 www.austriamicrosystems.com Revision 17732-005-10a ...

Page 4

... Bus activity and idle detection (only in NORMAL and RECEIVE ONLY mode) ..................................30 8.18.2 Bus data detection (only in NORMAL and RECEIVE ONLY mode)....................................................30 8.18.3 Receiver test signal .............................................................................................................................32 8.18.4 Transceiver Timing..............................................................................................................................33 8.19 Test Circuits ...................................................................................................................................................34 9 Appendix ...............................................................................................................................................35 9.1 FlexRay Functional Classes ............................................................................................................................35 9.2 FlexRay Parameter Comparison .....................................................................................................................35 10 Package Drawings and Markings...................................................................................................... 42 11 Ordering Information..........................................................................................................................43 www.austriamicrosystems.com .......................................................................................................................24 ......................................................................................................................24 CC Revision 17732-005-10a ...

Page 5

... INH2 INH1 TxD TxEN RxD BGE STBN Not used Not used RxEN ERRN V BAT WAKE GND Not used www.austriamicrosystems.com AS8221 Analog Output. Inhibit 2 output for switching external voltage ...

Page 6

... The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD- 020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). www.austriamicrosystems.com may cause permanent damage to the device. These are stress ratings only. Min ...

Page 7

... BUS_DIFF_D1 (Data1) Matching between Data0 ΔV and Data1 differential bus BUS_DIFF voltage in NORMAL mode Common mode bus voltage V in case of Data0 in non low BUS_COM_D0 power modes www.austriamicrosystems.com = 6 BAT IO Conditions 1 V =12V; Low Power Mode BAT T < 125ºC ...

Page 8

... TxEN_MISMATCH bus mismatch Delay time from BGE to t BGE_BUS_Idle_Active bus active Delay time from BGE to t BGE_BUS_Active_Idle bus idle Differential bus voltage t transition time: idle to BUS_Idle_Active active www.austriamicrosystems.com Conditions BPdata1 BMdata1 40Ω < R < 55Ω BUS COM_D0 ...

Page 9

... BUS_RxD10 negative edge Delay from BUS to RxD t BUS_RxD01 positive edge t Bit time BIT Delay time from BUS to t RxD_ASYM RxD mismatch www.austriamicrosystems.com Conditions Idle mode; R =∞ BUS Idle mode; R =∞ BUS Non low power modes TxEN Low power modes -40V < V < ...

Page 10

... V UV_DETECT V IO Detection time for t undervoltage recovery at UV_REC BAT CC Bus Error Detection Absolute bus current for I THL low current detection www.austriamicrosystems.com Conditions 80 RxD 3 C =15 pF RxD 20 RxD 3 C =15 pF RxD : 400mV → BUS : 0V → ...

Page 11

... STBN low level input I STBNIL current STBN de-bouncing time t STBN_DEB_LP low power modes STBN de-bouncing time t STBN_DEB_NLP non low power modes www.austriamicrosystems.com Conditions NORMAL mode, Transmitter enabled NORMAL mode, Transmitter enabled NORMAL mode, Transmitter enabled I = 0.2mA 5.5V BAT INH SLEEP mode, V ...

Page 12

... RO_EN_ERRN edge EN to ERRN t Error read out time out RO_EN_TIMEOUT 1. EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN, LWAKE, INH1, INH2: open 2. Test condition 2,5V ± For test signal (see Figure 18) www.austriamicrosystems.com Conditions I = -4mA ERRN I = 4mA ERRN I ...

Page 13

... AS8221 Objective Data Sheet - Typical Operating Characteristics Figure 3. Figure 5. Figure 7. www.austriamicrosystems.com Figure 4. Figure 6. Figure 8. Revision 17732-005-10a ...

Page 14

... Whenever an event is recognized, a transition can be performed. Operating Modes The AS8221 provides the following operating modes: NORMAL: non low power mode RECEIVE ONLY: non low power mode www.austriamicrosystems.com blocks(see Figure 1): Short Description Digital interface between the transceiver and the host controller (HC) The host interface comprises the read out handler, which delivers failure and status information via the ERRN pin to the host controller ...

Page 15

... POWER OFF In this mode the transceiver is not able to operate. RxD, RxEN are set to high and ERRN is set to low. INH1 and INH2 are floating. The bus wires are not connected to GND (bus state: Idle_HZ). www.austriamicrosystems.com Transmitter state Enabled Data1 (BP is driven high driven low) ...

Page 16

... BWU Data1 longer than Figure 9 BWUidle Figure 9. Signal for wake-up pattern recognition V BUS t BWU_D0 www.austriamicrosystems.com for a time longer than t then the undervoltage V UV_DETECT for a time longer than t BATTHH then the undervoltage V UV_DETECT for a time longer than t IOTHH for a time longer than t ...

Page 17

... The pull up and down mechanism is also active in non low power modes. Figure 10. WAKE input pin behavior PULL UP WAKE V BAT RxD / RxEN V IO INH V BAT www.austriamicrosystems.com for longer than t LWUTH PULL DOWN t LWUFilter Revision 17732-005-10a , a local wake-up LWFilter PULL UP t LWUFilter ...

Page 18

... Voltage recovery event and/or flag for V BAT REC Voltage recovery event and/or flag for V REC Voltage recovery event and/or flag for V REC CC Wake: Wake event and/or flag www.austriamicrosystems.com EN=0 WHILE (STBN=1) Receive Only Input: Output INH1 = 1 STBN = 1 INH2 = 1 EN=1 WHILE (STBN=1) ...

Page 19

... Starting from a low power mode the device enters the operation mode indicated by the host input pins if a wake-up event occurs. In case all the undervoltage flags are reset the operation mode is selected by the wake-up flag and the host pins according to Table 6. www.austriamicrosystems.com undervoltage detection. CC ≥ while V ...

Page 20

... STANDBY U NORMAL SLEEP U SLEEP U NORMAL S S STANDBY RECEIVE U ONLY U SLEEP U www.austriamicrosystems.com OutPut RxD ERRN L Bus = Data_0 not (Error flag) H Bus = Idle or Data_1 L Bus = Data_0 not (Error flag) H Bus = Idle or Data_1 not (Wake-upake- not (Wake-up flag) up flag) not (Wake-up flag) not (Wake-up flag) ...

Page 21

... SLEEP U STANDBY W U SLEEP STANDBY NORMAL S S STANDBY SLEEP SLEEP SLEEP www.austriamicrosystems.com Under Voltage Flag Wake Flag BAT (1) H→ (2) H→L (1) L→ (1) H→ (2) H→ ...

Page 22

... WAKE (1) Indicates the action, that initiates the transition (2) Indicates the consequence after performed transition (3) Incase of Wake flag is set not possible to enter SLEEP mode through a Sleep command, requested by the host. (4) In case an undervoltage on V www.austriamicrosystems.com Under Voltage Flag Wake Flag V V ...

Page 23

... This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data1 longer than the absolute value of the BP pin current is lower than I BUS_ERROR driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off. www.austriamicrosystems.com HOST COMMAND LWAKE FLAG STBN ...

Page 24

... This flag is the logical “AND” between: low current on BM high side and high current on BM low side. BM short circuit to GND This flag is the logical “AND” between: high current on BM high side and low current on BM low side. www.austriamicrosystems.com Revision 17732-005-10a after t ...

Page 25

... If EN pin keeps on toggling after last flag (Bit 15) the next flag shifted out is Bit 0. The RO_EN_ERRN complete list of bits is shown in Table 10 transition is detected on pin EN for longer than t device enters the operation mode indicated by the host pins. www.austriamicrosystems.com then the flag is set otherwise it is reset. SHORT . ...

Page 26

... Fault condition power off is always recognized, if the device is in power off state. In this case the ERRN output pin is switched to “low” for signalling an error and the bus lines are switched to Idle_HZ (bus idle, with high impedance, that means bus lines are floating). www.austriamicrosystems.com Bit 0 Bit 1 ...

Page 27

... Whenever the TxEN timeout flag is set, the bus lines are switched into Idle or Idle_LP Over temperature Whenever the over temperature flag is set, the bus lines are switched into Idle or Idle_LP. No mode change Whenever the no mode change flag is set, an error is indicated on the ERRN pin. www.austriamicrosystems.com Revision 17732-005-10a ...

Page 28

... Figure 14. Transmitter characteristics (TxEN → BUS) V TxEN 50 BUS t TxEN_BUS_Active_Idle V BUS_DIFF_D1 300 BUS_DIFF_Idle - V BUS_DIFF_Idle - 300 mV V BUS_DIFF_D0 www.austriamicrosystems.com Data1 Data0 BIT t t BUS01 BUS10 Data1 Data0 BIT < t < t TxEN_timeout TxEN_timeout t t TxEN_BUS_Idle_Active BUS_Active_Idle Revision 17732-005-10a ...

Page 29

... In NORMAL and RECEIVE ONLY mode the transmitter drives on the bus Idle in case no data are transmitted. In STANDBY SLEEP and SLEEP mode the transmitter drives Idle_LP (idle low power) on the bus pins. In POWER OFF mode the bus pins shows Idle_HZ (idle high impedance). www.austriamicrosystems.com t t ...

Page 30

... Bus data detection (only in NORMAL and RECEIVE ONLY mode) If, after the activity detection the differential bus voltage is higher than VData1, RxD will be high after a time t If, after the activity detection the differential bus voltage is lower than VData0, RxD will be low after a time t www.austriamicrosystems.com Data0 Data1 ...

Page 31

... AS8221 Objective Data Sheet - Figure 17. Receiver characteristics (BUS → RxD, RxEN) V BUS V BUS Data0 Activity www.austriamicrosystems.com V RxD V RxEN V V BUSActiveLow BUSActiveHigh V V Data0 Data1 Data1 Idle Activity Revision 17732-005-10a V BUS V BUS ...

Page 32

... Receiver test signal Figure 18. Receiver test signal V BUS 22 ns 400 mV 300 mV -300 mV -400 mV RxD V BUS 22 ns 400 mV 300 mV -300 mV -400 mV RxD www.austriamicrosystems.com t BIT t BUS_RxD01 t BIT t BUS_RxD10 Revision 17732-005-10a BUS_RxD10 BUS_RxD01 ...

Page 33

... AS8221 Objective Data Sheet - Transceiver Timing Figure 19. Timing Diagram www.austriamicrosystems.com Revision 17732-005-10a ...

Page 34

... VBAT VCC AS8221 Figure 21. Test circuit for dynamic characteristics 10uF 14 VBAT www.austriamicrosystems.com ISO 7637 PULSE GENERATOR +5V 100nF Transients in accordance with ISO7637: test pulses 1, 2, 3a, 3b Test conditions: Normal mode bus idle, Normal mode bus active (TXD=5 MHz, TXEN=1kHz) ...

Page 35

... Total power dissipation (all supplies - and outputs) - Storage temperature - Junction temperature - Package body temperature - Humidity non-condensing Supply Voltage Tamb Ambient temperature Difference of supplies current consumption BAT BAT www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name ) - BAT ) - uESDExt , WAKE BAT uESDint - - BAT - ...

Page 36

... GNDShortMax shorted to GND Absolute max current when BP is IBP -5VShortMax shorted Absolute max current when BM is IBM -5VShortMax shorted Absolute max current when BP is IBP 27VShortMax shorted www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name - - - - - - - uBDTx active uBDTx active ...

Page 37

... BP, Idle voltage in low power modes on BPidle_low V pin BP, BM BMidle_low I Absolute idle output current on pin BP BPidle Absolute idle output current on pin I BMidle BM www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name IBM BAT27VShortMax IBP BAT48VShortMax IBM BAT48VShortMax dBDTx10 dBDTx01 dTxAsym dBusTx10 dBusTx01 dBDTxia ...

Page 38

... Idle or Data1 detection time in remote t BWU_Idle wake-up pattern t Total remote wake-up detection time BWU_Detect V Bus wake-up detection threshold BWUTH www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name iBPLeak, iBMLeak Absolute leakage current, when not uBusActiveHigh uBusActiveLow uData1 uData0 uData uCM dBDRx10 ...

Page 39

... Differential voltage on BP and BM V for detecting short circuit between bus SHORT lines t Bus error detection time BUS_ERROR Over Temperature OT Over temperature threshold TH OT Over temperature hysteresis TL www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name - - pin - dWakePulseFilter V for WU BAT detector - uUVBAT - uUVCC ...

Page 40

... STBN low level input current STBNIL STBN de-bouncing time low power t STBN_DEB_LP modes STBN de-bouncing time non low t STBN_DEB_NLP power modes Threshold for detecting ENIH logical high www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name - - uVIO-IN-HIGH uVIO-IN-LOW - - uVIO-IN-HIGH uVIO-IN-LOW - - uVIO-OUT-HIGH ...

Page 41

... RxEN high level output voltage RXENOH V RxEN low level output voltage RXENOL Read Out Interface Propagation delay falling edge RO_EN_ERRN ERRN t Error read out time out RO_EN_TIMEOUT www.austriamicrosystems.com Electrical Physical Layer Specification V2.1 Rev. B Name uVIO-IN-LOW - - - - uVIO-OUT-HIGH uVIO-OUT-LOW uVIO-IN-HIGH uVIO-IN-LOW - ...

Page 42

... A2 1.68 1. 0.25 0. 0.09 0.15 D See Variations E 5.20 5.30 e 0.65 BSC H 7.65 7.80 L 0.63 0.75 Note: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994 . 2. All dimensions are in millimeters, angle is in degrees the total number of terminals. www.austriamicrosystems.com Max Symbol Min 1.99 L1 0.21 N α 0º 1.78 0.38 R 0.09 0.33 0.20 6.07 0.16 AA 6.07 AB 7.07 5. 8.07 7.90 AE 10.07 0.95 AF 10.07 Revision 17732-005-10a Typ Max 1 ...

Page 43

... AS8221 Objective Data Sheet - Ordering Information Table 14. Ordering Information Type Marking www.austriamicrosystems.com Description Revision 17732-005-10a Delivery Form Package ...

Page 44

... The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein ...

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