at89lv55 ATMEL Corporation, at89lv55 Datasheet - Page 14

• Manufacturer Part Number: at89lv55
• Description: At89lv55 8-bit Microcontroller With 20k Bytes Flash
• Manufacturer: ATMEL Corporation

12. Interrupts
Table 12-1.
14
(MSB)
User software should never write 1s to unimplemented bits, because they may be used in future AT89 products.
Symbol
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables the interrupt.
ET2
ET1
EX1
ET0
EX0
EA
ES
AT89LV55
–
EA
Interrupt Enable (IE) Register
–
The AT89LV55 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown
in
Each of these interrupt sources can be individually enabled or disabled by setting or clearing a
bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
Note that
AT89LV51, bit position IE.5 is also unimplemented. User software should not write 1s to these
bit positions, since they may be used in future AT89 products.
Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Nei-
ther of these flags is cleared by hardware when the service routine is vectored to. In fact, the
service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt,
and that bit will have to be cleared in software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag,
TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows. For further infor-
mation, see the Microcontroller Data Book, section titled “Interrupts.”
Position
Figure
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
12-1.
Table 12-1
ET2
Function
Disables all interrupts. If EA = 0, no interrupt is acknowledged. If EA = 1, each
interrupt source is individually enabled or disabled by setting or clearing its
enable bit.
Reserved.
Timer 2 interrupt enable bit.
Serial Port interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
shows that bit position IE.6 is unimplemented. In the AT89C51 and
ES
ET1
EX1
ET0
0811D–MICRO–3/06
EX0
(LSB)