mic3003 Micrel Semiconductor, mic3003 Datasheet - Page 13

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mic3003

Manufacturer Part Number
mic3003
Description
Fom Management Ic With Internal Calibration
Manufacturer
Micrel Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mic3003GML
Manufacturer:
MICROCHIP
Quantity:
1 000
Micrel, Inc.
Electrical Characteristics
Notes:
10. Guaranteed by design and/or testing of related parameters. Not 100% tested in production.
11. The MIC3003 will not respond to serial bus transactions during an EEPROM write cycle. The host will receive a NACK response during t
May 2009
Symbol
Control and Status I/O Timing, TXFAULT, TXDISABLE, RS0, RRSOUT, and RXLOS
t OFF
t ON
t INIT
t INIT2
t FAULT
t RESET
t LOSS_ON
t LOSS_OFF
t DATA
t PROP_IN
t PROP_OUT
Fault Comparators
t REJECT
V SAT
Power-On Hour Meter
Non-Volatile (FLASH) Memory
t
Endurance
WR
FLTTMR
Parameter
TXDISABLE Assert Time
TXDISABLE De-assert Time
Initialization Time
Power-on Initialization Time
TXFAULT Assert Time
Fault Reset Time
RXLOS Assert Time
RXLOS De-assert Time
Analog Parameter Data Ready
TXFAULT, TXDISABLE, RXLOS,
RS0, RS1 Input Propagation Time
TXFAULT, TRSOUT, TRRSOUT,
/INT, QGPO Output Propagation
Time
Fault Suppression Timer Clock
Period
Accuracy
Glitch Rejection
Saturation Detection Threshold
Timebase Accuracy
Resolution
Write Cycle Time, Note 11
NVRAM Data Retention
Maximum permitted number of write
cycles to any single NVRAM location
Condition
From input asserted to optical output
at 10% of nominal, C
From input de-asserted to optical output
at 90% of nominal, C
From power on or transmitter enabled to
optical output at 90% of nominal and
TX_FAULT de-asserted. Note 10
From power on to APC loop-enabled.
From fault condition to TXFAULT
assertion. Note 10
Length of time TXDISABLE must be
asserted to reset fault condition.
From loss of signal to RXLOS asserted.
From signal acquisition to LOS
de-asserted.
From power on to valid analog
parameter data available. Note 10
Time from input change to
corresponding internal register bit set or
cleared. Note 10
From an internal register bit set or
cleared to corresponding output change.
Note 10
Note 10
Maximum length pulse that will not
cause output to change state. Note 10
High level
Low level
0°C ≤ T
–40°C ≤ T
Note 10
Measured from the SMBus STOP
condition of a one-byte to eight-byte
write transaction. Note 10
A
≤ +70°, Note 10
A
≤ +105°C
13
COMP
COMP
= 10nF.
= 10nF.
hbwhelp@micrel.com
10,000
0.475
Min
+10
100
4.5
+5
10
-3
Typ
0.5
95
10
5
or (408) 955-1690
M9999-052709-A
0.525
Max
300
200
100
400
-10
10
95
95
+3
13
-5
1
1
1
MIC3003
WR
.
%VDDA
%VDDA
cycles
Units
hours
years
%/fs
ms
ms
ms
ms
ms
ms
µs
µs
µs
µs
µs
µs
µs
µs
%
%

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