a625308 AMIC Technology Corporation, a625308 Datasheet - Page 9
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a625308
Manufacturer Part Number
a625308
Description
32k X 8 Bit Cmos Sram
Manufacturer
AMIC Technology Corporation
Datasheet
1.A625308.pdf
(13 pages)
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Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
Notes: 1. t
PRELIMINARY
2. A Write occurs during the overlap (t
3. t
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs
5. t
6. OE level is high or low.
7. Transition is measured 500mV from steady. This parameter is sampled and not 100% tested.
Address
D
WE
CE
OUT
remain in a high impedance state.
D
AS
WR
CW
IN
is measured from the address valid to the beginning of Write.
(6)
is measured from the earliest of CE or WE going high to the end of the Write cycle.
is measured from the later of CE going low to the end of Write.
(December, 2000, Version 0.2)
t
AS 1
(4)
WP
) of a low CE and a low WE .
t
AW
t
t
CW 5
WP
t
8
WC
t
2
WHZ 7
t
DW
t
WR 3
t
DH
AMIC Technology, Inc.
A625308 Series