qf4a512 ETC-unknow, qf4a512 Datasheet - Page 31

• Manufacturer Part Number: qf4a512
• Description: 4-channel Programmable Signal Converter Psc
• Manufacturer: ETC-unknow

11. EEPROM
11.1 Overview
space for application specific use, for example Transducer Electronic Data Sheets (TEDS).
Address space 0007 through 0EFF can be automatically transferred at startup to the corresponding Register and RAM addresses. Full
transfers can also be initiated, in either direction, by writing to the EETRANS (EEPROM Transfer) register. Manual single-byte and
block transfers can be performed as described below.
11.2 EEPROM Transfer Procedures
Usually the SPI port connects directly to the chip’s internal serial interface (SIF) control block. The SIF allows the user to read or write
to on-chip control registers and RAMs. In turn the SIF controls data transfers internally between the registers/RAM and EEPROM.
The following describes procedures to transfer data to/from the EEPROM.
Manual Single Byte and Multi-Byte Transfers
Manual transfers between the register map & coefficient RAM, and the EEPROM occur as follows:
Set the clock rate divider for the transfer based on the crystal frequency as the source: eeclk_rate = 000 to 101 (Register
STARTUP_1, 07h). 000 = XTAL rate, 001 = divby2 … 101 = divby32.
Set the source address:
For reads from EEPROM: EE_STADDR (17h).
For writes to EEPROM: CHIP_STADDR (18h).
Set the destination starting address (can be different from source address):
For reads from EEPROM: CHIP_STADDR (18h).
For writes to EEPROM: EE_STADDR (17h).
For single byte transfers:
Set the destination ending address to the same value as the destination starting address: END_ADDR (1Bh).
For multi-byte transfers:
Set the destination address to the desired ending address of the destination block. See the following paragraph for applicable
restrictions.
Start the transfer:
For EEPROM reads: Set the rd_start bit in the EE_TRANS register (05h).
For EEPROM writes: Set the wr_start bit in the EE_TRANS register (05h).
Wait for the transfer to complete. One way to accomplish this is to continually try reading the GLBL_ID register (01h) until you get the
correct ID value.
Rev C5, Jan 07
Table 14. EEPROM Memory Map
The internal EEPROM is used to store the QF4A512's FIR coefficients, general parameters and startup mode as well as have user
0F80
0F00
0100
0007
0000
User Data
(128 bytes)
Chip Calibration
(128 Bytes)
Filter Coefficient
Data
Control and
status data
Not used
PRELIMINARY
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