tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 212

• Manufacturer Part Number: tda5235
• Description: Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
• Manufacturer: Infineon Technologies Corporation

Field
PDSR
PHDEN1
PHDEN0
PVAL
PSAT
Clock and Data Recovery Configuration Register
Data Sheet
Bits
7:6
5
4
3:2
1:0
Type
w
w
w
w
w
Description
Peak-Detector slew rate. The slew rate of the Peak-Detector in the
clock-recovery path will be set with
PDSR. Actually, Peak-Detector part of Signal Detector Block
00
01
10
11
Reset: 3
Phase detector error (PDE) outer tolerance range
0
1
Reset: 1
Phase detector error (PDE) inner tolerance range
0
1
Reset: 0
P Value. The PVAL is the P value of the Clock-Recovery PI Loop-
Filter. The Phase-
Detector output error will be multiplied with the set value.
00
01
10
11
Reset: 1
P Value Saturation. The saturation of the P-Loop-Filter path will be
set according to the PSAT
value. Remark that the internal phase resolution of the phase detector is
1/16 bit.
00
01
10
11
Reset: 2
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
PDEin.
PDEin.
up/down = 1/64
up = 1/64; down = 1/128
up = 1/32; down = 1/128
up = 1/32; down = 1/256
Disabled: PDEout = PDEin.
Enabled: If PDEin > abs(7/16) bit then PDEout = 0 else PDEout =
Disabled: PDEout = PDEin.
Enabled: If PDEin < abs(1/16) bit then PDEout = 0 else PDEout =
1/1 phase detector error
1/2 phase detector error
1/4 phase detector error
1/8 phase detector error
saturation to 1/16 bit
saturation to 2/16 bit
saturation to 4/16 bit
saturation to 8/16 bit
H
H
H
H
H
212
Register Description
V1.0, 2010-02-19
Appendix
TDA5235