sx8723 Semtech Corporation, sx8723 Datasheet - Page 14

• Manufacturer Part Number: sx8723
• Description: Sx8723 Zoomingadc? For Pressure And Temperature Sensing
• Manufacturer: Semtech Corporation

ADVANCED COMMUNICATIONS & SENSING
I
The I
the slave side of the communication.
General features:
The interface handles I
transactions. A read transaction is an external request to get the content of system memory location and a write
transaction is an external request to write the content of a system memory location.
I
I
The default I
This is the standard part I
special request.
V1.5 © 2007 Semtech Corp.
2
2
2
Ready
Ready
SDA
SCL
C Communication Format
C Address
C
SDA
SDA
SDA
SCL
SCL
SCL
...
...
2
C interface gives access to the chip registers. It complies with the I
Start
Start
Start
Start
Slave only operation
Fast mode operation (up to 400 kHz)
Combined read and write mode support
General call reset support
7-bit device address customization
Stretch I
1
1
1
1
1
1
1
1
2
C slave address is 1001000 in binary.
0
0
0
0
Master
Master
Master
2
Slave Address
Slave Address
Slave Address
Slave Address
0
0
0
0
C clock SCL only before sending ACK/NACK
Master
1
1
1
1
Figure 7 - Timing Diagram for Reading an ADC Sample from SX8723
0
0
0
0
2
C communication at the transaction level: the processor is only aware of read and writes
0
0
0
0
2
0
0
0
0
C slave address. Other addresses between 1001001 and 1001111 are available by
Figure 5 - Timing Diagram for Reading from SX8723
Figure 6 - Timing Diagram for Writing to the SX8723
W
W
W
W
0
0
0
0
SX8723
SX8723
SX8723
SX8723
ACK
ACK
ACK
ACK
9
9
0
9
0
0
9
0
A7
A7
1
1
0
1
1
0
A6
A6
1
1
A5
A5
0
0
Memory Address
Memory Address
RegACOutMsb
RegACOutLsb
ZoomingADC™ for Pressure and Temperature Sensing
A4
A4
1
1
Master
Master
Master
Master
A3
A3
0
0
A2
A2
0
0
A1
A1
0
0
A0
A0
1
0
SX8723
SX8723
SX8723
SX8723
ACK
ACK
ACK
ACK
9
9
9
9
14
Start
Start
Start
Start
1
1
1
1
1
1
1
1
0
0
0
0
Slave Address
Slave Address
Slave Address
0
Slave Address
0
0
Master
0
Master
Master
Master
1
1
1
1
0
0
0
0
0
0
0
0
2
C protocol specifications, restricted to
0
0
0
0
R
W
R
R
1
0
1
1
SX8723
ACK
ACK
ACK
ACK
9
9
9
9
D7
D7
D7
D7
1
1
1
1
D6
D6
D6
D6
D5
D5
D5
D5
SX8723
SX8723
SX8723
D4
D4
D4
D4
Master
Data
Data
Data
Data
D3
D3
D3
D3
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D2
D2
D2
D2
D1
D1
D1
D1
D0
D0
D0
D0
SX8723
SX8723
NACK Stop
NACK Stop
NACK Stop
ACK Stop
9
9
9
9
Master
Master
Master
Master
...
...