lm25061pmmx-2 National Semiconductor Corporation, lm25061pmmx-2 Datasheet - Page 13

• Manufacturer Part Number: lm25061pmmx-2
• Description: Positive Low Voltage Power Limiting Hot Swap Controller
• Manufacturer: National Semiconductor Corporation

basing it on the current limit value provides a more reliable
design since the circuit can operate near the current limit
threshold continuously. The resistor’s surge capability must
also be considered since the circuit breaker threshold is ap-
proximately twice the current limit threshold. Connections
from R
POWER LIMIT THRESHOLD
The LM25061 determines the power dissipation in the exter-
nal MOSFET (Q1) by monitoring the drain current (the current
in R
at the PWR pin (R
for Q1, and is calculated from the following equation:
where P
and R
Limit section. For example, if R
power limit threshold is 20W, R
Q1’s power dissipation reaches the threshold Q1’s gate is
modulated to regulate the load current, keeping Q1’s power
from exceeding the threshold. For proper operation of the
power limiting feature, R
power limiting circuit is active, the fault timer is active as de-
scribed in the Fault Timer & Restart section. Typically, power
limit is reached during startup, or if the output voltage falls due
to a severe overload or short circuit.
The programmed maximum power dissipation should have a
reasonable margin from the maximum power defined by the
FET's SOA chart if the LM25061-2 is used since the FET will
be repeatedly stressed during fault restart cycles. The FET
manufacturer should be consulted for guidelines.
If the application does not require use of the power limit func-
tion the PWR pin can be left open.
TURN-ON TIME
The output turn-on time depends on whether the LM25061
operates in current limit, or in both power limit and current
limit, during turn-on.
A) Turn-on with current limit only: The current limit thresh-
old (I
the current limit threshold is less than the current defined by
the power limit threshold at maximum V
at the current limit threshold only during turn-on. Referring to
Figure 10a, as the load current reaches I
S
), and the V
LIM
S
S
is the current sense resistor described in the Current
) is determined by the current sense resistor (R
FET(LIM)
to the LM25061 should be made using Kelvin tech-
R
PWR
= 2.32 x 10
is the desired power limit threshold for Q1,
DS
PWR
of Q1 (SENSE to OUT pins). The resistor
) sets the maximum power dissipation
PWR
5
x R
must be
S
PWR
S
is 10 mΩ , and the desired
x P
calculates to 46.4 kΩ. If
FET(LIM)
DS
≤
150 kΩ. While the
the circuit operates
FIGURE 7. Sense Resistor Connections
LIM
, the gate-to-
S
). If
(2)
13
niques. In the suggested layout of Figure 7 the small pads at
the lower corners of the sense resistor connect only to the
sense resistor terminals, and not to the traces carrying the
high current. With this technique, only the voltage across the
sense resistor is applied to VIN and SENSE, eliminating the
voltage drop across the high current solder connections.
source voltage is controlled at V
I
the drain current reduces to its normal operating value. The
time for the OUT pin voltage to transition from zero volts to
V
where C
C
maximum instantaneous power dissipated in the MOSFET is
12W. This calculation assumes the time from t1 to t2 in Figure
10a is small compared to t
current until after the output voltage has reached its final val-
ue, (Figure 8). If the load draws current during the turn-on
sequence (Figure 9), the turn-on time is longer than the above
calculation, and is approximately equal to:
where R
must be set longer than t
the turn-on sequence is complete.
LIM
SYS
L
. As the output voltage reaches its final value, (V
= 1000 µF, and I
is equal to:
L
L
is the load capacitance. For example, if V
is the load resistance. The Fault Timeout Period
LIM
ON
= 1A, t
ON
to prevent a fault shutdown before
30090319
, and the load does not draw any
ON
GSL
calculates to 12 ms. The
to maintain the current at
www.national.com
SYS
DS
= 12V,
≊
0V)