pi2eqx5804d Pericom Semiconductor Corporation, pi2eqx5804d Datasheet - Page 9

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pi2eqx5804d

Manufacturer Part Number
pi2eqx5804d
Description
5.0gbps 4-lane Pcie? 2.0 Redrivertm With Equalization & Emphasis
Manufacturer
Pericom Semiconductor Corporation
Datasheet

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Configuration Register Summary
I
The integrated I
7-bit addressing mode. The data byte format is 8 bit bytes. The bytes must be accessed in sequential order
from the lowest to the highest byte with the ability to stop after any complete byte has been transferred. Ad-
dress bits A4, A1 and A0 are programmable to support multiple chips environment. The data is loaded until a
Stop sequence is issued.
0
1
2
3
4
5
6
7
8
9
10
11
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Byte Mnemonic
2
C Operation
SIG
RX50
LBEC
INDIS
OUTDIS
RESET
PWR
RXDE
AEOC
AEOC
RSVD
RSVD
2
C interface operates as a slave device, supporting standard rate operation of 100Kbps, with
Signal Detect, indicates valid input signal level
Receiver Detect Output, indicates whether a receiver load was detected
Loopback and Emphasis Control, provides for control of the loopback function and emphasis mode (pre-
emphasis or de-emphasis)
Channel Input Disable, controls whether s channels input buffer is enabled or disabled
Channel Output Disable: Controls whether a channels output buffer is enabled or disabled
Channel Reset
Power Down Control, enables power down for each channel individually
Receiver Detect Enable, controls the receiver detect operation
A-Channels Equalizer and Output Control
B-Channels Equalizer and Output Control
Reserved
Reserved
Function
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis
9
10-0170
www.pericom.com
PI2EQX5804D
P-0.1
05/28/10

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