ncn6000 ON Semiconductor, ncn6000 Datasheet - Page 21

• Manufacturer Part Number: ncn6000
• Description: Compact Smart Card Interface Ic
• Manufacturer: ON Semiconductor

Power Management
circuit functions needed to run a given mode of operation,
yielding a minimum current consumption on the Vbat
supply. In the Standby mode (PWR_ON = L), the power
management provides energy to the card detection circuit
only. All the card interface pins are forced to ground
potential.
external MPU (PWR_ON = H, CS = L), the power manager
starts the DC−DC converter.
value (3.0 V or 5.0 V), the circuit activates the card signals
according to the following sequence:
depending upon the state forced by the external MPU, when
the start up sequence is completed. Under no situation the
NCN6000 shall launch automatically a smart card ATR
sequence. Assuming PWR_ON = H, the CRD_VCC voltage
The purpose of the power management is to activate the
In the event of a power up request coming from the
When the CRD_VCC voltage reaches the programmed
The logic level of the data lines are asserted High or Low,
CRD_VCC Power Down Fall Time
CRD_VCC
CRD_VCC
CRD_RST
CRD_CLK
CP = 15 pF
CRD_IO
⇒CRD_IO
⇒CRD_CLK
⇒CRD_RST
CRD_VCC No Change
CRD_VCC No Change
CRD_VCC Rise Time
CRD_VCC
PWR_ON
5.0 V
Figure 15. Smart Card Signals Sequence at Power On
CS
Figure 14. Card Power Supply Control
2 ms
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NCN6000
21
is maintained whatever be the logic level presents on Chip
Select, pin 6.
(PWR_ON = L, CS = L), or under a card extraction, the
ISO7816−3 power down sequence takes place:
is forced into the High impedance mode to avoid signal
collision with any data coming from the external MPU.
PWR_ON logic signal as depicted in Figure 14. The
PWR_ON logic level define the CRD_VCC voltage status,
the amplitude being the one pre programmed into the chip.
smart card, the NCN6000 internal logic circuit, together
with the Vbat monitoring, clamps the card outputs until the
CRD_VCC voltage reaches the minimum value. During the
CRD_VCC slope, all the card outputs are kept Low and no
spikes can be write to the smart card. The oscillogram on the
right hand side is a magnification of the curves given on the
opposite side.
At the end of the transaction, asserted by the MPU
When CS = H, the bi−directional I/O line (pins 8 and 15)
The CRD_VCC voltage is controlled by means of CS and
In order to avoid uncontrolled command applied to the
CRD_RST
⇒CRD_CLK
250 ms
CRD_VCC
5.0 V
CRD_RST
CRD_CLK
CP = 15 pF
CRD_IO
⇒CRD_IO
⇒CRD_VCC