adg2108 Analog Devices, Inc., adg2108 Datasheet
adg2108
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adg2108 Summary of contents
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... CMOS 8 × 10 Unbuffered Analog Switch Array with Dual/Single Supplies GENERAL DESCRIPTION The ADG2108 is an analog cross point switch with an array size of 8 × 10. The switch array is arranged so that there are eight columns by 10 rows, for a total of 80 switch channels. The array is bidirectional, and the rows and columns can be configured as either inputs or outputs ...
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... Load Switch (LDSW)................................................................. 18 Readback ..................................................................................... 18 Serial Interface ................................................................................ 19 2 High Speed I C Interface........................................................... 19 Serial Bus Address...................................................................... 19 Writing to the ADG2108 ............................................................... 20 Input Shift Register .................................................................... 20 Write Operation.......................................................................... 22 Read Operation........................................................................... 22 Evaluation Board ............................................................................ 24 Using the ADG2108 Evaluation Board ................................... 24 Power Supply............................................................................... 24 Schematics................................................................................... 25 Outline Dimensions ....................................................................... 27 Ordering Guide .......................................................................... 27 Rev Page ...
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... Ω pF MHz typ dB typ % typ Ω pF MHz L L ° typ Ω pF MHz typ Ω min V max µA typ µA max pF typ ADG2108 = − − ...
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... ADG2108 Parameter +25°C 2 LOGIC INPUTS (SCL, SDA) Input High Voltage, V INH Input Low Voltage, V INL Input Leakage Current, I 0.005 IN Input Hysteresis Input Capacitance LOGIC OUTPUT (SDA) 2 Output Low Voltage Floating State Leakage Current POWER REQUIREMENTS Interface Inactive ...
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... pF MHz Ω pF MHz Ω pF MHz Ω pF MHz Ω ADG2108 = − − − − − − p-p ...
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... ADG2108 B Version Parameter +25°C Input Leakage Current, I 0.005 IN Input Hysteresis Input Capacitance LOGIC OUTPUT (SDA) Output Low Voltage Floating State Leakage Current POWER REQUIREMENTS Interface Inactive 0.3 Interface Active: 400 kHz f 0.1 SCL Interface Active: 3.4 MHz f 0.4 SCL 1 Temperature range is as follows: B version: – ...
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... Standard mode 10 Fast mode High speed mode 100 pF maximum 400 pF maximum GND = unless otherwise noted (see Figure 2). A MIN MAX ADG2108 Limit MIN MAX Min Max Unit 100 kHz 400 kHz 3.4 MHz 1.7 MHz 4 µs 0.6 µ ...
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... A device must provide a data hold time for SDA to bridge the undefined region of the SCL falling edge. TIMING DIAGRAM SCL t 6 SDA START CONDITION P = STOP CONDITION ADG2108 Limit MIN MAX Min Max Unit 1000 0.1 C 300 ...
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... This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability mA, L Rev Page ADG2108 ...
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... Logic Input. Address pin that sets the third least significant bit of the 7-bit slave address. 31 RESET Active Low Logic Input. When this pin is low, all switches are open, and appropriate registers are cleared GND Ground. Reference point for all circuitry on the ADG2108 recommended that the exposed paddle be soldered ...
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... SOURCE VOLTAGE (V) Figure 8. R vs. Temperature, Dual ±5 V Supplies 12V +125° 10mA +85° –40° SOURCE VOLTAGE (V) Figure 9. R vs. Temperature ADG2108 V = 8.8V DD 4.0 4 +25° +25° ...
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... ADG2108 10mA +85° –40° 0.5 1.0 1.5 2.0 2.5 SOURCE VOLTAGE (V) Figure 10. R vs. Temperature + – CHANNELS TEMPERATURE (°C) Figure 11. On Leakage vs. Temperature, Dual ±5 V Supplies ...
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... V = +5V TO +12V – – 25°C A –40 –60 –80 –100 –120 1G 10G 10 Rev Page ADG2108 1k 100k 10M 1G 10G FREQUENCY (Hz) 1k 100k 10M FREQUENCY (Hz) Figure 20. Off Isolation vs. Frequency ADJACENT CHANNELS NON-ADJACENT CHANNELS 1k 100k 10M FREQUENCY (Hz) Figure 21. Crosstalk vs. Frequency ...
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... ADG2108 0. + –5V SS 0.30 0.25 0.20 0.15 0.10 0. 0.5 1.0 1.5 2.0 FREQUENCY (MHz) Figure 22. Digital Current (I ) vs. Frequency L 1.8 1.6 1 1.2 1.0 0.8 0 (V) LOGIC Figure 23. Digital Current (I ) vs. V for Varying Digital Supply Voltage L LOGIC 0 – –40 –60 – –100 –120 2.5 3.0 100 Rev Page ...
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... OFF OFF SW OFF ûV OUT × ûV INJ L OUT 0.1µF 0.1µF NETWORK V V ANALYZER 50 GND V WITH SWITCH OUT INSERTION LOSS = 20 log V WITHOUT SWITCH OUT Figure 31. Bandwidth ADG2108 50 OUT L ...
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... ADG2108 V DD 0.1µF NETWORK ANALYZER OUT 50 X2 50 V DATA X BIT GND V OUT CHANNEL-TO-CHANNEL CROSSTALK = 20 log V Figure 32. Channel-to-Channel Crosstalk V SS 0.1µ 50 50 S Rev Page ...
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... Input Low Voltage (V ) INL The maximum input voltage for Logic 0. Output Low Voltage (V OL The minimum input voltage for Logic 1. Input Low Voltage (V ) INL The maximum output voltage for Logic Positive supply current Negative supply current. Rev Page ADG2108 ) ) ...
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... All of these features are described in more detail here in the Theory of Operation section. RESET/POWER-ON RESET The ADG2108 offers the ability to reset all of the 80 switches to the off state. This is done through the RESET pin. When the RESET pin is low, all switches are open (off), and appropriate registers are cleared ...
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... See the Ordering Guide for details. SERIAL BUS ADDRESS The ADG2108 has a 7-bit slave address. The four MSBs are hard coded to 1110, and the three LSBs are determined by the state of Pin A0, Pin A1, and Pin A2. By offering the facility to hardware configure Pin A0, Pin A1, and Pin A2 eight of these devices can be connected to a single serial bus ...
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... DATA BITS Figure 33. Data-Words Descriptions The MSBs of the ADG2108 are set to 1110. The LSBs of the address byte are set by the state of the three address pins, Pin A0, Pin A1, and Pin A2. Controls whether the ADG2108 slave device is read from or written to the ADG2108 is being read from. ...
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... (off ) 0 1 Reserved 0 1 Reserved (on (off ) .. .. (off ) 1 0 Reserved 1 0 Reserved (on (off ) .. .. (off ) 1 1 Reserved 1 1 Reserved (on (off ) .. .. (off ) ADG2108 ...
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... All other switches retain their previous condition. READ OPERATION Readback on the ADG2108 is designed to work as a tool for debug and can be used to output the status of any of the 80 switches of the device. The readback function is a two-step sequence that works as follows: 1 ...
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... DATA BYTE BY SWITCH R/W ACK DUMMY READBACK BYTE BY SWITCH Figure 35. Read Operation Rev Page RB0 ACK DATA BYTE BY SWITCH ACK READBACK BYTE BY MASTER ADG2108 x STOP NO ACK COND BY BY SWITCH MASTER Y0 STOP NO ACK COND BY BY MASTER MASTER ...
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... ADG2108 EVALUATION BOARD The ADG2108 evaluation board allows designers to evaluate the high performance ADG2108 8 × 10 switch array with a minimum of effort. The evaluation kit includes a populated, tested ADG2108 printed circuit board. The evaluation board interfaces to the USB port can be used as a standalone evaluation board ...
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... SCHEMATICS Figure 36. EVAL-ADG2108EB Schematic, USB Controller Section Rev Page ADG2108 ...
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... ADG2108 Figure 37. EVAL-ADG2108EB Schematic, Chip Section Rev Page ...
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... ADG2108BCPZ-REEL7 –40°C to +85°C 1 ADG2108BCPZ-HS-RL7 –40°C to +85°C 1 ADG2108YCPZ-R2 –40°C to +125°C ADG2108YCPZ-REEL7 1 –40°C to +125°C 1 ADG2108YCPZ-HS-RL7 –40°C to +125°C EVAL-ADG2108EB Pb-free part. 5.00 BSC SQ 0.60 MAX 24 0.50 BSC TOP 4.75 VIEW BSC SQ ...
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... ADG2108 NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...