adg3301 Analog Devices, Inc., adg3301 Datasheet

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adg3301

Manufacturer Part Number
adg3301
Description
Low Voltage 1.15 V To 5.5 V, Single-channel Bidirectional Logic Level Translator
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
Bidirectional level translation
Operates from 1.15 V to 5.5 V
Low quiescent current < 5 µA
No direction pin
APPLICATIONS
SPI®, MICROWIRE® level translation
Low voltage ASIC level translation
Smart card readers
Cell phones and cell phone cradles
Portable communication devices
Telecommunications equipment
Network switches and routers
Storage systems (SAN/NAS)
Computing/server applications
GPS
Portable POS systems
Low cost serial interfaces
GENERAL DESCRIPTION
The ADG3301 is a single-channel, bidirectional logic level
translator. It can be used in multivoltage digital system applica-
tions such as data transfer between a low voltage DSP/controller
and a higher voltage device. The internal architecture allows the
device to perform bidirectional logic level translation without an
additional signal to set the direction in which the translation
takes place.
The voltage applied to V
the device, while V
operation, V
compatible logic signals applied to the A pin appear as V
compatible levels on the Y pin. Similarly, V
levels applied to the Y pin appear as V
on the A pin. The enable pin (EN) provides three-state operation
on both the A pin and the Y pin. When the device enable pin is
pulled low, the terminals on both sides of the device are in the
high impedance state. The EN pin is referred to the V
voltage and driven high for normal operation.
The ADG3301 is available in a compact 6-lead SC70 package
and is guaranteed to operate over the 1.15 V to 5.5 V supply
voltage range and extended −40°C to +85°C temperature range.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
CCA
must always be less than V
CCY
sets the levels on the Y side. For proper
CCA
sets the logic levels on the A side of
CCA
-compatible logic levels
CCY
CCY
Low Voltage 1.15 V to 5.5 V, Single-Channel
. The V
-compatible logic
CCA
CCA
supply
-
CCY
-
Bidirectional Logic Level Translator
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PRODUCT HIGHLIGHTS
1. Bidirectional level translation.
2. Fully guaranteed over the 1.15 V to 5.5 V supply range.
3. No direction pin.
4. Compact 6-lead SC70 package.
FUNCTIONAL BLOCK DIAGRAM
EN
A
© 2005 Analog Devices, Inc. All rights reserved.
V
CCA
Figure 1.
GND
ADG3301
V
CCY
ADG3301
www.analog.com
Y

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adg3301 Summary of contents

Page 1

... The EN pin is referred to the V voltage and driven high for normal operation. The ADG3301 is available in a compact 6-lead SC70 package and is guaranteed to operate over the 1. 5.5 V supply voltage range and extended −40°C to +85°C temperature range. ...

Page 2

... ADG3301 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Test Circuits..................................................................................... 12 Terminology .................................................................................... 15 REVISION HISTORY 12/05—Revision 0: Initial Version Theory of Operation ...................................................................... 16 Level Translator Architecture ................................................... 16 Input Driving Requirements..................................................... 16 Output Load Requirements ...

Page 3

... CCA 0.65 × V CCA 0.35 × V ± 1.8 (A→Y), CCA 3 ADG3301 Unit V V CCA µ CCY µ CCA µA pF µ Mbps Mbps ...

Page 4

... ADG3301 1 Parameter Y→A Translation Propagation Delay Rise Time Fall Time Maximum Data Rate Part-to-Part Skew 1. 1.3 V ≤ V ≤ 3.3 V ± 0.3 V CCA CCY CCY A→Y Translation Propagation Delay Rise Time Fall Time Maximum Data Rate Part-to-Part Skew Y→A Translation Propagation Delay ...

Page 5

... CCA A CCA Y CCY 5 CCA CCY V V/V , CCY A CCA Y CCY 5 CCA CCY 5 HiZA CCA CCY 5 HiZY CCA CCY Rev Page ADG3301 2 Min Typ Max Unit 1.15 5.5 V 1.65 5.5 V 0.17 5 µA 0.27 5 µA 0.1 5 µA 0.1 5 µA ...

Page 6

... ADG3301 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 2. Parameter V to GND CCA V to GND CCY Digital Inputs (A) Digital Inputs ( GND Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature θ Thermal Impedance (4-Layer Board) JA 6-Lead SC70 Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature (< ...

Page 7

... Active High Enable Input Input/Output Y. Referenced Power Supply Voltage Input for the Y I/O Pin (1.65 V ≤ V CCY CCA CCY ADG3301 TOP VIEW 5 (Not to Scale) GND Figure 2. Pin Configuration CCA . CCA . CCY CCY Rev Page ADG3301 ≤ CCY ≤ 5.5V). ...

Page 8

... ADG3301 TYPICAL PERFORMANCE CHARACTERISTICS 1 25° CHANNEL 0 50pF L 0 3.3V, V CCA CCY 0.7 0.6 0.5 0.4 V CCA 0.3 0.2 0 1.2V, V CCA DATA RATE (Mbps) Figure 3. I vs. Data Rate (A→Y Level Translation) CCA 25° CHANNEL 50pF 3.3V CCA CCY ...

Page 9

... DATA RATE = 50kbps 3.0 2.5 30Mbps 2.0 20Mbps 1.5 1.0 10Mbps 0.5 5Mbps Figure 14. Fall Time vs. Capacitive Load at Pin Y Rev Page ADG3301 = 25 ° 3. 50Mbps 30Mbps 20Mbps 10Mbps 5Mbps CAPACITIVE LOAD (pF) vs. Capacitive Load at Pin A for Y→A CCA (5 V→3.3 V) Level Translation V = 1.2V 1.8V ...

Page 10

... ADG3301 25° CHANNEL 9 DATA RATE = 50kbps 1.2V 1.8V CCA CCY CCA CCA CAPACITIVE LOAD (pF) Figure 15. Rise Time vs. Capacitive Load at Pin A (Y→A Level Translation) 4 25° CHANNEL 3.5 DATA RATE = 50kbps 3.0 2 1.2V 1.8V CCA ...

Page 11

... Figure 24. Eye Diagram at A Output (3 1.8 V Level Translation, 50 Mbps) 1V/DIV Figure 25. Eye Diagram at Y Output (3 Level Translation, 50 Mbps) 800mV/DIV Figure 26. Eye Diagram at A Output ( 3.3 V Level Translation, 50 Mbps) Rev Page ADG3301 T = 25°C A DATA RATE = 50Mbps C = 15pF L 1 CHANNEL ...

Page 12

... CCY 0.1µF Y CAPACITANCE METER EN ADG3301 V CCY V CCA A Y GND Figure 33. Capacitance at Pin Y Rev Page ADG3301 V CCY V CCA A Y GND Figure 30. Three-State Leakage Current at Pin Y ADG3301 V CCA 0.1µ GND Figure 31. EN Pin Leakage Current EN ADG3301 V CCA A GND Figure 32 ...

Page 13

... CCA CCY ADG3301 + 0.1µ 50pF EN GND V CCY ADG3301 + 0.1µF 10µ GND V CCA CCA CCY CCY CCA 0V V CCA CCA CCY CCY CCA 0V IN BOTH A → Y AND Y → A DIRECTIONS. ADG3301 10µF 1MΩ K2 1MΩ K2 ...

Page 14

... 50pF 15pF A→ 90% 50% 10 A→Y Figure 36. Switching Characteristics (Y→A Level Translation) Rev Page CCY EN ADG3301 + V CCA 0.1µF 10µF + 10µ 50Ω GND Y→A P, Y→ Y→ ...

Page 15

... Y→A direction. I CCA V supply current. CCA I CCY V supply current. CCY I HiZA V supply current during three-state mode (EN = 0). CCA I HiZY V supply current during three-state mode (EN = 0). CCY Rev Page ADG3301 ...

Page 16

... High impedance state normal operation, the ADG3301 performs level translation. T2 While the ADG3301 enters into tri-state mode. In this 6kΩ mode, the current consumption from both the V supplies is reduced, allowing the user to save power, which is critical especially on battery-operated systems. The EN input pin ...

Page 17

... Absolute Maximum Ratings section). supply voltage combi- Table 5 shows the guaranteed data rates at which the ADG3301 can operate in both directions (A→Y or Y→A level translation) for various V and V ...

Page 18

... ADG3301 APPLICATIONS The ADG3301 is designed for digital circuits that operate at different supply voltages; therefore, logic level translation is required. The lower voltage logic signals are connected to the A pin, and the higher voltage logic signals are connected to the Y pin. The ADG3301 can provide level translation in both directions from A→ ...

Page 19

... COMPLIANT TO JEDEC STANDARDS MO-203-AB Figure 39. 6-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-6) Dimensions shown in millimeters Package Description 6-Lead Thin Shrink Small Outline Transistor Package 6-Lead Thin Shrink Small Outline Transistor Package Rev Page 0.30 0.22 0.10 0.08 1 Branding Package Option S0H KS-6 S0H KS-6 ADG3301 ...

Page 20

... ADG3301 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05517-0-12/05(0) Rev Page ...

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